Comments on: Clearspeed: 1 TFLOPS in 16u http://insidehpc.com/2007/09/20/clearspeed-1-tflops-in-16u/ HPC News Without the Noise for Supercomputing Professionals | insideHPC Fri, 03 May 2013 04:44:25 +0000 hourly 1 http://wordpress.org/?v=3.1.1 By: ClearSpeed’s software and looking forward to 1TF in 1u | insideHPC http://insidehpc.com/2007/09/20/clearspeed-1-tflops-in-16u/#comment-10231 ClearSpeed’s software and looking forward to 1TF in 1u | insideHPC Sun, 23 Sep 2007 00:02:47 +0000 http://insidehpc.com/2007/09/20/clearspeed-1-tflops-in-16u/#comment-10231 [...] Clearspeed: 1 TFLOPS in 16u [...] [...] Clearspeed: 1 TFLOPS in 16u [...]

]]> By: mark hahn http://insidehpc.com/2007/09/20/clearspeed-1-tflops-in-16u/#comment-10001 mark hahn Thu, 20 Sep 2007 23:06:09 +0000 http://insidehpc.com/2007/09/20/clearspeed-1-tflops-in-16u/#comment-10001 clearspeed is very nice, but is it keeping up with the market? for instance, the current gen of normal cpu chips have 4 cores, each delivering up to 4 flops/cycle at 2-3 GHz. true, they're more like half a gflop/watt, but that's not a massive, paradigm-shifting difference. in 16U, it seems to me that I could put 16 dual-socket servers with quad-core core2 chips at 2.6 GHz or better. that's over a teraflop, no? I'd expect it to dissipate around 6KW. clearspeed is very nice, but is it keeping up with the market? for instance, the current gen of normal cpu chips have 4 cores, each delivering up to 4 flops/cycle at 2-3 GHz. true, they’re more like half a gflop/watt, but that’s not a massive, paradigm-shifting difference.

in 16U, it seems to me that I could put 16 dual-socket servers with quad-core core2 chips at 2.6 GHz or better. that’s over a teraflop, no? I’d expect it to dissipate around 6KW.

]]>