SRC shows off new reconfigurable processor

SC07: SRC Computers is reporting from SC07 today that they’ve got a new version of their MAP reconfigurable processor, the Series I

SRC Computers, Inc., a leader in reconfigurable computing systems, demonstrated its implementation of a Black-Scholes double precision floating point algorithm, one of the most important mathematical tools in modern finance, on its newest Series I MAP reconfigurable processor at the Supercomputing 2007 show in Reno, Nev. The application level computational performance of the Series I MAP is over 150 million Black-Scholes experiments per second. This level of performance is equivalent to over 30 high-end microprocessors while consuming only 20 watts of power, making systems with the Series I MAP extremely cost-effective high performance computing solutions. Systems built with the Series I MAP will use SRC’s Carte high-level language programming environment and will be the first SRC product available using AMD Opteron processor-based boards. As a result, applications developed for SRC systems will be software compatible regardless of the microprocessor type.

…Systems built with the Series I MAP are part of the SRC-7 product line, which includes SRC’s flagship systems using the feature-rich Series H MAP. The entire SRC-7 product line maximizes performance by using Altera FPGAs, which include the largest FPGAs available today.

Full story at SC Online.