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Intel Set to Leak More Info on Tukwila

Intel is set to divulge more information on the upcoming Itanium codenamed  “Tukwila” today at the International Solid State Circuits Conference in San Francisco. So far, we know that Tukwila will be a quad-core Itanium chip at 65nm. It will operate at up to 2Ghz with dual-integrated memory controllers using Intel’s QuickPath interconnect [rather than a traditional front-side bus]. All in all, Tukwila is scheduled to squeeze 2 billion transistors onto a single chip.

Intel logoThe more transistors on a chip, the more work you get out of that chip,” said Dean Freeman, an analyst at Gartner Inc. “With one of these new chips, you should get better performance than you would with two chips out of the previous generation.”

Intel’s current Itanium line, the dual core Montecito, is manufactured at 90nm with 1.7 billion transistors.

Be on the lookout for more info today and tomorrow, but in the mean time read the full article here.

Comments

  1. Unless you run large distributed jobs with lots of communication (in which case you should consider getting a large SMP anyway) I suggest you make price/performance benchmarks of your applications before jumping on the new Itanium.

    Perhaps for the same X amount of money you can get way more nodes with slower cpus, but all together they will provide your cluster with higher throughput than a smaller number of nodes with top-shelf IA-64 on board.

    -marek


    clusteradmin.net :: a blog about building and administering clusters

  2. I partially agree with you Marek. I agree the choice to head down the Itanium road is application specific. However, I don’t believe communication necessarily has anything to do with it. There are several communication-bound applications that perform as well or better in a distributed memory, x86 environment when utilizing high performance interconnects [IB]. On the other hand, Itaniums perform quite well when the applications analyst(s) fully understand how to utilize the positive aspects of the IA64 [ie, very large cache]. [See GFDL’s FMS code]
    Either way, we can all agree that in most situations, `N` distributed memory x86 nodes are less costly than the same `N` Itanium nodes.
    Thanks for the comments!

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