Ashlee Vance has written over at The Register about remarks made by Chuck Moore, Senior Fellow at Advanced Micro Devices and currently the Chief Engineer of AMD’s next-generation processor design, while speaking to students at Stanford on June 4. Here’s the quote from Vance’s piece
Overall, Moore argued that these heterogeneous machines with x86 and GPU processors will make more sense moving forward than the so-called many-cored chips that the likes of Sun and Intel are pursuing where software is spread across tens or even hundreds of similar cores.
I immediately gravitated to this article because Chuck is obviously a smart guy, and the points in this article largely jibe with many of the points I made in a presentation late last year about what HPC would look like in 2017 for the DoD. The only guy interacting with me during that talk spent most of his energy quota for the month eviscerating my point of view and in general acting as though I was a moron. Which I might be, but that sort of behavior in public just isn’t cricket (as the English say).
My points were primarily around the practicality of designing working chips. From Vance’s piece
Like others, Moore argued that we’ll soon run into a major software issue, as too few applications will be able to deal with many-cored chips. Things look okay with two, four and even eight core chips, but we’re in real trouble after that.
Moore’s vision of the future
His “throughput machine” would include a number of Opteron chips up front to handle existing software and to crunch through single-threaded code. Then, you combine the Opterons with “a large number of small, power-efficient, domain optimized compute offload engines.”
Moore spent some time specifically addressing what he sees as real problems with the Cell processor, much in the news recently for its role in the RoadRunner PFLOPS milestone.
IBM’s Cell chip will struggle to woo server customers looking to turbo charge certain applications because the part has a fundamental design flaw, according to…Chuck Moore.
Sure, sure. Cell is a multimedia throughput dynamo and its SPEs (Synergistic Processing Elements) are just lovely. “But something happened on the way to the ranch,” Moore said, speaking this week to a group of Stanford students. “You have to get going first on the PowerPC chip (inside Cell), and the PowerPC core is too weak to act as the central controller.”
The whole article is interesting; I recommend a read.