At an ISSCC session Monday, Intel went into new detail on its forthcoming 8-core, 16-thread Xeon processor, a 64-bit processor that’s a member of the Nehalem family. Much of the session was focused on the packaging and power aspects of the device, so I’ll recap some of the more interesting parts of that here.
I particularly enjoyed reading this bit
One major part of the Xeon presentation is Intel’s “cache and core recovery” scheme, which lets the company salvage a usable part from a defective chip by disabling the defective regions and selling the chip with a lower core count or cache amount.
So for instance, if testing and validation finds a defect in a cache slice on a chip, then Intel can disable that slice and sell the chip with lower cache. And likewise with cores, so that you might buy a six-core chip from Intel that was originally produced as an 8-core Xeon but had two defective cores.
More (much) in this interesting article. Recommended read.