SiCortex is one of the few HPC vendors who doesn’t have at least one product line in the Nehalem refresh fest that marked today’s chip launch. Of course their gear is based on MIPS processors. Not to be left out the news cycle, SiCortex is shopping around the opposition point of view, which landed in my inbox today. First, from Chris Stone, president and CEO
- Intel’s Nehalem Xeon EP processor addresses a performance bottleneck in previous Intel chip architectures but does little to address the industry’s need for improved energy-efficiency.
- The industry needs to pick up the pace of embracing new approaches to computation. We must address the pressing need to reign-in data center energy consumption and costs.
- The computer industry needs to make a bold commitment to reducing energy consumption at all levels — from the chip to the system architecture to the data center. We at SiCortex have taken that need to heart, and have developed our computers from the silicon up to radically improve energy efficiency – creating the world’s most energy efficient systems.
- Hardware manufacturers who have built on Intel have little choice other than to embrace the new processor. The need to overcome memory bottlenecks experienced by their customers is compelling enough for vendors to bite the bullet and pay the extra expense of the new chip.
And then from Jud Leonard, co-founder and chief architect
Systems based on the new Nehalem EP processor should deliver improved performance on the desktop and for small clusters, but the new chip is unlikely to significantly impact the speed of large scale systems. Memory bandwidth is important, but it is only one of three key elements in system design. Unfortunately Intel has reached the practical limit of processor clock speed, and QPI, their interprocessor communications solution, does not scale. The latter is the Achilles heel for thousand-plus processor HPC systems when it comes to delivered performance. Large scale systems built on Nehalem will continue to rely on external I/O interface chips and commodity switches to communicate, impacting performance, energy consumption and cost.
What do you think? Is Intel getting credit for putting out a fire they themselves started (with the now-improved memory bandwidth)? Is this really too little when it comes to large scale HPC?
Often when a vendor is making arguments like this it is in favor of some custom kit that doesn’t have the power of mass consumption economics, but one can hardly make that case against MIPS processors — those things are crammed into everything from TIVOs to Windows CE devices and Cisco routers.