You can put a supercomputer in a pizza box? DARPA wants to talk to you.

I found this via a tweet to a slashdot post pointing to an article at NetworkWorld (whew!). DARPA issued an RFI for its Ubiquitous High Performance Computing program last week, and this really does look like a DARPA hard problem.

The goal of the effort:

The goal of the envisioned UHPC program is to provide the revolutionary technology needed to meet the steadily increasing demands of DoD applications – from embedded to command center and expandable to high performance computing systems. This may be accomplished by developing highly parallel processing systems with significantly increased power efficiency, enabling ease of programming application development for the user, and resilient execution through all modes of system failure.

…The UHPC Program is seeking solutions that will explore the technologies and architectures required to enable the development of revolutionary computing architectures and systems and overcome “business as usual” advances. This can only be achieved via dedicated investment, hardware-software co-design, integrated design techniques, and continuous innovation. Since a high degree of innovation will be a critical element throughout the UHPC program and heavily weighted in all program evaluations, it should be an important consideration in team formation. The goals of the program are to explore, develop, and prototype a UHPC system, applicable to all DoD computer systems. It is assumed that architectural designs developed under this program will be applicable to systems ranging from embedded terascale systems up through at least single cabinet petascale configurations.

And a quote truly after my own heart

Current processing systems are grossly power-inefficient and typically deliver only a small fraction of peak performance.

From the list of things the program is interested in looking at, it seems like they are taking a smart path to getting to their very lofty goals (more in a moment)

To address these concerns the UHPC program will pursue, but will not be limited to: 1 co-development and optimization of ExtremeScale architectures and applications, programming models, and tools – the critical co-design of hardware and software; 2 low-energy architectures and protocols for logic, memory, data access, and data transport; 3 concurrency management and efficient use of massively parallel resources; 4 locality-aware architectures to reduce data movement; 5 self-aware and learning capabilities to manage real-time performance and resource optimization; 6 coordinated development of resiliency techniques (including detection and correction, fail-in-place self-healing, and learning) 7 security; and 8 physical packaging and thermal issues. UHPC is seeking solutions to break through current performance limitations and increase achievable performance, power efficiency, and system reliability for in field embedded through advanced intelligence analysis applications.

In that list I resonate most with co-development of hardware and software, and the locality-aware architectures piece (which is reminiscent of Sun’s original DARPA HPCS proposal). So, about those goals, here are a couple

New system-wide technology approaches specifically including hardware and software co-design to minimize energy dissipation per operation and maximize energy efficiency, with a 50GFLOPS per watt goal, without sacrificing scalability to ultra-high performance DoD applications – efficiency.

Develop new technologies and execution models that do not require application programmers to explicitly manage system complexity, in terms of architectural attributes with respect to data locality and concurrency, to achieve their performance and time to solution goals – programmability.

Develop technology that will manage hardware and software concurrency, minimizing overhead

Jiminy Christmas, Batman. 50 GLOPS/w is a big jump. The top system on the Green500 is at .5 GLOPS/w today (IBM BladeCenter QS22 clusters). There is hope, though: according to this Wikipedia article, Intel’s 80-core Terascale chip got to 16 GLOPS/w, but then it wasn’t actually usable for computation.

I think this is pretty exciting, and the kind of thing the government is actually supposed to think more about. If anyone is putting a team together, I’m interested.

Comments

  1. Isn’t that a bit contradictory to note that current systems “deliver only a small fraction of peak” and then specify the goals in terms of theoretical, never-to-be-achieved peak flops per watt. How about specfprate(base) or specintrate(base) per watt?

  2. Your posting included the following RFI:

    “Develop new technologies and execution models that do not require application programmers to explicitly manage system complexity, in terms of architectural attributes with respect to data locality and concurrency, to achieve their performance and time to solution goals – programmability.”

    The DARPA HPCS program is (was?) funding development of two new HPCS programming languages – one by Cray and one by IBM – with goals that sounded awfully similar to the above.

    Does this mean DARPA (or the vendors) have given up on these HPCS language projects? Or is DARPA just throwing more tax money at the subject, in the hopes of getting something interesting? Despite any clear evidence that application developers are truly interested in rewriting their applications in any new language?

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