The HyperTransport Consortium has announced that it will conduct a morning tutorial at the Hot Chips high-performance chip conference next week. The tutorial will take place Sunday, August 23 in the Memorial Auditorium at Stanford University. The presentation will be given by Jose Duato, professor of computer science at the Polytechnic University of Valencia, Spain.
A morning tutorial on system interconnects during Hot Chips 21. The HyperTransport Consortium will educate attendees on the latest features offered by the industry’s highest performance, lowest latency interconnect technology, HyperTransport 3. In addition to covering bandwidth and reliability enhancements, the Consortium will discuss the new hyperTransport High Node Count (HNC) specification, which has been developed to address the need for highly scalable, resource-efficient, energy-efficient, and cost-optimized computing platforms. Attendees will learn how this new specification will transform the data center, cloud computing and high-performance computing application.
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