Sign up for our newsletter and get the latest HPC news and analysis.

Cray officially launches Baker as XE6

CUG is in Scotland this week, and CEO Ungaro has donned his best sporran for the announcement today that the company’s next generation high end super is no longer just a codename.

Previously known as “Baker”, Cray today announced that the new machine would be marketed as the XE6. Why not [something][something]7? Why go backwards from “T” to “E”? Why do they call is ovaltine when the can is round? Who would fardels bear? Ask the man with the sporran.

Cray logo“Today’s unveiling of the Cray XE6 supercomputer marks a significant milestone for the company, as we launch an entirely new high performance computing system built on years of innovation and hard work by Cray employees company-wide,” said Peter Ungaro, president and CEO of Cray. “This is an exciting day for the company and for our customers around the world who have been eagerly awaiting the new Cray XE6 supercomputer — a system capable of scaling to more than a million processing cores. We are proud to have already secured more than $200 million in contracts for this system and are even more excited about our opportunity to give researchers, scientists and engineers around the world a next-generation tool for solving next-generation problems.”

Among the places we’ve covered over the past several months that are already signed up for the new XE6 are the Korea Meteorological Administration, NERSC, the U.S. Air Force Research Laboratory, the Arctic Region Supercomputing Center, the U.S Army Engineer Research and Development Center, the National Nuclear Security Administration, the Engineering and Physical Sciences Research Council (EPSRC), and NOAA.

At the heart of the Cray XE6 supercomputer is the new Gemini interconnect, which is designed to fundamentally change and significantly improve how Cray supercomputers move data across the system. Designed to support multi-core processors with a 100-fold improvement in messaging rates and a three-fold reduction in latency, the Gemini interconnect also includes hardware support for a global user address space. The Gemini interconnect is in part made possible by Cray’s participation in the Defense Advanced Research Projects Agency’s High Productivity Computing Systems program.

I’ll be talking with Cray later this week — look for my feature coverage on the launch then.

Resource Links: