JP Morgan Uses FPGAs Accelerators for Risk Analysis in Near Real-time

Print Friendly, PDF & Email

Computerworld UK is reporting that JP Morgan is now able to run risk analysis and price its global credit portfolio in near real-time after implementing Maxeler Technologies FPGA-based accelerators.

Prior to the implementation, JP Morgan would take eight hours to do a complete risk run, and an hour to run a present value, on its entire book. If anything went wrong with the analysis, there was no time to re-run it. It has now reduced that to about 238 seconds, with an FPGA time of 12 seconds.

Being able to run the book in 12 seconds end-to-end and get a value on our multi-million dollar book within 12 seconds is a huge commercial advantage for us,” Stephen Weston, global head of the Applied Analytics group in the investment banking division of JP Morgan, said at a recent lecture to Stanford University students.JP Morgan uses mainly C++ for its pure analytical models and Python programming for the facilitation. For the new Maxeler system, it flattened the C++ code down to a Java code.

The faster processing times allow JP Morgan to respond to changes in its risk position more rapidly, rather than just looking back at the risk profile of the previous day. Read the Full Story.

Trackbacks

  1. […] investment bank worked with HPC solutions provider Maxeler Technologies to develop an application-led, HPC system based on […]

  2. […] JP Morgan Uses FPGAs Accelerators for Risk Analysis in Near Real-time […]