Comments on: AMD Ships First “Bulldozer” Processors to Big Super Installations http://insidehpc.com/2011/09/07/amd-ships-first-bulldozer-processors-to-big-super-installations/ HPC News Without the Noise for Supercomputing Professionals | insideHPC Sun, 19 May 2013 10:46:54 +0000 hourly 1 http://wordpress.org/?v=3.1.1 By: Janes Hyde http://insidehpc.com/2011/09/07/amd-ships-first-bulldozer-processors-to-big-super-installations/#comment-369805 Janes Hyde Fri, 09 Sep 2011 01:24:27 +0000 http://insidehpc.com/?p=22906#comment-369805 Is it a god idea to be showng Buldozer in front of a "BEWARE OF LOW HEADROOM" warning? Is it a god idea to be showng Buldozer in front of a “BEWARE OF LOW HEADROOM” warning?

]]> By: RichB http://insidehpc.com/2011/09/07/amd-ships-first-bulldozer-processors-to-big-super-installations/#comment-369591 RichB Thu, 08 Sep 2011 05:11:03 +0000 http://insidehpc.com/?p=22906#comment-369591 Bdobbins, all good questions. Let me look into this ;-) -Rich Bdobbins, all good questions. Let me look into this ;-) -Rich

]]> By: B http://insidehpc.com/2011/09/07/amd-ships-first-bulldozer-processors-to-big-super-installations/#comment-369507 B Wed, 07 Sep 2011 19:37:01 +0000 http://insidehpc.com/?p=22906#comment-369507 Rich, Any chance of contacting CSCS, EPCC or ORNL and getting some benchmark results from them? It doesn't quite seem fair to call Interlagos a 16 'core' chip when it's 8 modules, each with 2 integer cores and a unified double-wide FPU. How that translates into performance in scientific applications seems unclear to me, since so much will depend on scheduling. Integer performance will, I assume, be pretty damn good, but that's hardly the rate limiting step in most physics-based computational models. I'm sure these places(*) didn't buy without some early access to hardware and indications of expected gains, and SPEC.org doesn't seem to have the CPU2006 fp/fp_rate test results yet, which is a bit worrying. InsideHPC would surely be doing well to have some data, right? :-) (*) ORNL's is, I believe, mostly a 'host' platform for the Tesla boards, at least in so far as FPU performance is concerned. But I don't think the EPCC and CSCS installs are GPU-based systems, are they? Rich,

Any chance of contacting CSCS, EPCC or ORNL and getting some benchmark results from them? It doesn’t quite seem fair to call Interlagos a 16 ‘core’ chip when it’s 8 modules, each with 2 integer cores and a unified double-wide FPU. How that translates into performance in scientific applications seems unclear to me, since so much will depend on scheduling. Integer performance will, I assume, be pretty damn good, but that’s hardly the rate limiting step in most physics-based computational models.

I’m sure these places(*) didn’t buy without some early access to hardware and indications of expected gains, and SPEC.org doesn’t seem to have the CPU2006 fp/fp_rate test results yet, which is a bit worrying. InsideHPC would surely be doing well to have some data, right? :-)

(*) ORNL’s is, I believe, mostly a ‘host’ platform for the Tesla boards, at least in so far as FPU performance is concerned. But I don’t think the EPCC and CSCS installs are GPU-based systems, are they?

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