As El Reg anticipated earlier this week, the new upper management at AMD has come to its senses and figured out that moving to a new core and two new sockets for its Opteron line in 2012 was not a particularly good idea for its own finances, or those of the server makers who it wants to peddle Opteron-based iron. And so, that plan has been scrapped.
Instead, AMD is going to field new 32 nanometer processors based on the forthcoming “Piledriver” core design and jam them into the same G34 and C32 sockets, meaning that HP, Dell, Super Micro, IBM, Acer, and a handful of other box makers will not have to engineer new motherboards and systems.
AMD CEO Rory Read, formerly of IBM and Lenovo, spoke at the company’s analyst day in Silicon Gulch on Thursday and said that the company sees that “proprietary control points” were breaking down and that AMD was chasing “inflection points” in the PC, tablet, and server spaces. He explained AMD would bring its expertise in CPU and GPU design together to crafty system-on-chip (SoC) products that will, presumably, also integrate network and other types of I/O directly on the chip.
“Shift happens, shift is good,” Read stated emphatically, and with a straight face, adding that AMD was being tweaked to become a “market driven company” and not second fiddle in an “unhealthy duopoly.” The task Read sees ahead for AMD is “about stepping out of the shadows and leading.”
But, according to Read and Lisa Su (a semiconductor researcher at IBM and former CTO at Freescale Semiconductor who was hired back in December to be senior vice president and general manager of the new Global Business Units,) what AMD needs to do right now in servers is to step back, ramp up production of Opteron 4200 and 6200 processors and rebuild and extend relationships with server makers as it plots out its future Opteron chips.
Sticking with the existing C32 sockets for the Opteron 4200 sockets and the G34 sockets for the Opteron 6200s is just part of listening to the customer. It also gives AMD some engineering breathing time to come up with interesting, low-power Opteron platforms that are tailored specifically for hyperscale Web, big data, server virtualization, database, and similar workloads where AMD’s Opterons do well.
“Server is a great opportunity for us, and it is clear that our market share is not very high today,” conceded Su. But she also said that the “Bulldozer” core and its different architecture takes time to get its footing. Considering this, introducing new sockets right now was a bad idea technically and economically for both AMD and server makers. “At the end of the day, that wasn’t the right answer for our customers,” Su said.
Back in November 2010, two months before CEO Dirk Meyer was ousted, the plan was to crank up the Opteron 6200s to 20 cores using the new Piledriver core, an improved version of the current “Bulldozer” core used in the Opteron 4200 and 6200 server processors as well as a number of desktop chips.
The plan called for the “Sepang” processor to have up to ten Piledriver cores and plug into the C32 sockets, which are used to make servers with one or two sockets across a single memory space. The “Terramar” Opteron chip was the kicker to the current Opteron 6200 and would put two of these Sepang chips in a single package and scale it up to 20 cores per socket. Both of these chips were implemented in the 32 nanometer silicon-on-insulator (SOI) processes from fab partner GlobalFoundries.
A year later, with microservers taking off (at least in terms of marketing hype), AMDannounced that it would chase microserver builders with a new single-socket Opteron 3000 chip, code-named “Zurich,” that plugged into the AM3+ socket. The Zurich chip is a variant of the Opteron 4200 with four or eight cores activated, one HyperTransport link, and – most importantly – availability in less expensive motherboards.
The Zurich chip, presumably to be called the Opteron 3200, was expected sometime in the first half of 2012 when AMD was talking about it last fall, but it is now going to be launched in the first quarter, as you can see in the roadmap below:
For larger Opteron systems, AMD is taking a conservative approach. Rather than adding two more cores to the basic Opteron processor unit, the new “Seoul” processor keeps the core count at six or eight as the new Piledriver core is brought in. The DDR3 main memory stays the same – two channels per socket – as with the current Opteron 4200s, and the chips will not include any additional on-chip I/O, such as the PCI-Express 3.0 links that Intel is putting on its forthcoming “Sandy Bridge” family of Xeon E5 processors for machines with one, two, or four sockets.
The high-end “Abu Dhabi” Opterons will have 4, 8, 12, and 16 Piledriver cores, the same core count as the Opteron 6200s that started shipping last summer, and will sport the same four channels of DDR3 memory per socket.
You’ll notice that AMD is not talking about how many HyperTransport links will be on these future Piledriver-based Opterons or what speed they will run at, so it makes perfect sense to conjecture that they will run at a faster rate – 8GT/sec sounds reasonable to match the expected 25 per cent increase in raw performance that AMD was promising for Piledriver cores in desktop processors.
AMD is also expecting to put out a kicker for the Opteron 3200, dubbed “Delhi” and offering four or eight Piledriver cores.
All of the new Opterons will be etched in GlobalFoundries’ 32 nanometer processes, just like the current ones are. On the desktop processor roadmaps that Su went over, the chips for 2012 and those for 2013 were clearly marked. Not so on the server chip roadmaps, but we placed a call to AMD and were told by a spokesman that all of the chips above will be coming out this year. The Abu Dhabi and Seoul Opterons are due towards the end of the year.
The big change, according to new AMD CTO Mark Papermaster, formerly of IBM, Apple, and Cisco Systems, was that AMD was shifting from a design philosophy that focused in the performance of processor cores, adopted the bleeding edge tech from GlobalFoundries or Taiwan Semiconductor Manufacturing Corp to try to compensate for the process lag AMD (and everyone else) has with Intel.
This lead to execution problems, and more importantly, Papermaster said that the company’s current managers do not believe that the process technology node trumps integration of functions on an SoC and the “experience” that the user has using a device based on AMD silicon.
Su didn’t give out a lot of details on the future Piledriver cores, except to say that it would be able to do more instructions per cycle and would have higher clock frequencies. Many had expected for Bulldozer to do better on the clock speed front.
Looking out further into the future, AMD is cooking up a third generation modular core called “Steamroller,” which would have a greater level of parallelism. This could mean a lot of different things, such as adding more threads or cores to the chip or adding more instruction units per core module. Su did not say, and it is likely that AMD is itself not quite sure what it means. And further out beyond that, AMD will crank out more performance in some unspecified way with a modular core design called “Excavator.”
It will be interesting to see what AMD integrates onto its server chips and how fast it can do it. In the meantime, Intel is going to make plenty of hay in the supercomputing market where there are workloads with heavy I/O demands because it can support PCI-Express 3.0 peripherals with the future Xeon E5 processors. It remains to be seen how much of an advantage this will be across the server market at large. ®