In this video from SC13, Donour Sizemore from Michael Waltrip Racing describes how his team uses AMD processors for CFD analysis of new NASCAR vehicle designs. According to Sizemore, even minute changes in the design of the vehicle can make the difference in their race to victory.
See more from the show in our SC13 Video Gallery.
[SPONSORED GUEST ARTICLE] Scaling GenAI inference performance requires increasing the number of GPUs or accelerators working in parallel within the scale-up domain. In-package optical I/O offers a path forward by breaking the ….
Today, every high-performance computing (HPC) workload running globally faces the same crippling issue: Congestion in the network.
Congestion can delay workload completion times for crucial scientific and enterprise workloads, making HPC systems unpredictable and leaving high-cost cluster resources waiting for delayed data to arrive. Despite various brute-force attempts to resolve the congestion issue, the problem has persisted. Until now.
In this paper, Matthew Williams, CTO at Rockport Networks, explains how recent innovations in networking technologies have led to a new network architecture that targets the root causes of HPC network congestion, specifically:
– Why today’s network architectures are not a sustainable approach to HPC workloads
– How HPC workload congestion and latency issues are directly tied to the network architecture
– Why a direct interconnect network architecture minimizes congestion and tail latency
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