Over at Computerworld, Agam Shah writes that Fujitsu is targeting 100-petaflop supercomputers with its next-generation SPARC64 XIfx chip. In combination with the company’s 12.5 Gbyte/sec Tofu 2 interconnect, the new chip will also feature fabric integration for CPU-to-CPU communications.
The SPARC64 XIfx chip has 32 processor cores and an array of memory and throughput technologies that improve data transfers within the system and between servers, according to a paper on the company’s website. Twelve XIfx chips will fit into a 2U chassis, giving the server 384 main processing cores. Each chip also has two “assistant” cores in addition to the 32 main processing cores, according to the presentation. The function performed by the assistance cores isn’t clear. The throughput improvements will include on-board support for Hybrid Memory Cube, which is considered an upgrade from DRAM in servers today.