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Researchers Build Memcomputing Prototype

Simplified schematic of the memprocessor architecture used in this work to solve the SSP.

Simplified schematic of the memprocessor architecture used in this work to solve the SSP.

Over at Scientific Advances, a newly published paper describes a high-efficiency architecture called memcomputing. Modeled after the human brain, a memprocessor processes and stores information within the same units by means of their mutual interactions.

Are memcomputers practical with today’s technology? Yes, says Massimiliano Di Ventra, a physicist and computer scientist at the University of California, San Diego. His team has built a memcomputing prototype with standard electronics that operate at room temperature.

Memcomputing is a novel non-Turing paradigm of computation that uses interacting memory cells (memprocessors for short) to store and process information on the same physical platform. It was recently proven mathematically that memcomputing machines have the same computational power of nondeterministic Turing machines. Therefore, they can solve NP-complete problems in polynomial time and, using the appropriate architecture, with resources that only grow polynomially with the input size. The reason for this computational power stems from properties inspired by the brain and shared by any universal memcomputing machine, in particular intrinsic parallelism and information overhead, namely, the capability of compressing information in the collective state of the memprocessor network. We show an experimental demonstration of an actual memcomputing architecture that solves the NP-complete version of the subset sum problem in only one step and is composed of a number of memprocessors that scales linearly with the size of the problem. We have fabricated this architecture using standard microelectronic technology so that it can be easily realized in any laboratory setting. Although the particular machine presented here is eventually limited by noise—and will thus require error-correcting codes to scale to an arbitrary number of memprocessors—it represents the first proof of concept of a machine capable of working with the collective state of interacting memory cells, unlike the present-day single-state machines built using the von Neumann architecture.

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