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Call for Papers: International Workshop on Performance-Portable Programming Models for Accelerators

Frankfurt2The first annual International Workshop on Performance Portable Programming Models for Accelerators has issued its Call for Papers. Known as P^3MA, the workshop will provide a forum for bringing together researchers, vendors, users and developers to brainstorm aspects of heterogeneous computing and its various tools and techniques.

P^3MA takes place June 23 in conjunction with ISC 2016 in Frankfurt.

High-Level programming models offer scientific applications a path onto HPC platforms without an undue loss of portability or programmer productivity. For example, using directives, application developers can port their codes to accelerators incrementally while minimizing code changes. Other approaches include Domain Specific Languages, C++ metaprogramming, and runtimes APIs being developed for Exascale which are starting to emerge. Although these approaches aim to introduce abstraction without performance penalty, programming challenges are still manyfold especially with their designs, implementations and application porting experiences on rapidly evolving hardware, some with diverse memory subsystems. The programming approaches will need to adapt to such developments and make improvements to raise their performance portability that will increase the productivity of accelerators as HPC components. Such improvements are continuously being discussed with standards committees for C++, OpenCL, OpenMP, OpenACC, and Exascale co- design centers for DSLs. This workshop is designed to assess the improved features of programming models (including but not limited to directives-based programming models), their implementations, and experiences with their deployment in HPC applications on multiple architectures.

Topics of interest (but are not limited to):

  • Experience porting applications using high-level models
  • Hybrid heterogeneous or many-core programming with other models such as threading, message passing, and PGAS
  • Performance-portable scientific libraries for heterogeneous systems
  • Experiences in implementing compilers for programming directives on current and emerging architectures
  • Low level communications APIs or runtimes that support accelerator directives
  • Asynchronous task and event driven execution/scheduling
  • Extensions to programming models needed to support multiple memory hierarchies and accelerators
  • Performance modeling and evaluation tools
  • Power/energy studies
  • Auto-tuning or optimization strategies
  • Benchmarks and validation suites

Abstract submissions are due April 20, 2016.

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