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Call for Papers: 2nd International Workshop on Performance Portable Programming Models for Accelerators

The 2nd International Workshop on Performance Portable Programming Models for Accelerators (P^3MA) has issued its Call for Papers. He held in conjunction with ISC 2017, the event takes place June 22 in Frankfurt, Germany.

The workshop provides a forum bringing together researchers and developers to examine heterogeneous computing and how it has been evolving across an increasingly diverse set of accelerated architectures. Including an invited opening keynote address and a closing Q&A panel with all presenters, this workshop will provide perspectives from current research and a chance for attendees to actively participate in this quickly changing and growing area of HPC research.

High-level programming models aim to provide scientific applications a path onto HPC platforms with minimal loss of portability or programmer productivity. Emerging approaches include Domain Specific Languages (DSLs), C++ metaprogramming, directives, and runtime APIs. Using these, developers can incrementally port their codes to heterogeneous systems, sometimes with minimal code changes. Although these approaches attempt to introduce abstraction without performance penalty, programming challenges remain, with their designs, implementations, and ease-of-use on rapidly evolving hardware and diverse memory subsystems. Programming approaches to address these concerns are continuously being developed within standards committees for C++, OpenCL, OpenMP, OpenACC, and various DSLs. This workshop is designed to assess improved features of programming models (including but not limited to directives-based and C++ library-based programming models), their implementations, and experiences with their deployment in HPC applications.

Topics of interest for workshop submissions include (but are not limited to):

  • Experience porting applications using high-level models focused on performance portability and productivity
  • Hybrid heterogeneous or many-core programming with models such as threading, message passing, and PGAS
  • Asynchronous task and event driven APIs and execution/scheduling
  • Performance-portable scientific libraries for heterogeneous systems
  • Experiences in implementing compilers for performance portable programming on current and emerging architectures
  • Low level communications APIs or runtimes that support accelerator architectures
  • Extensions to programming models needed to support multiple memory hierarchies and accelerators
  • Performance modeling and evaluation tools
  • Power/energy studies
  • Auto-tuning or optimization strategies
  • Benchmarks and validation suites

Submissions are due April 3, 2017.

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