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Search Results for: fpga

This Week in HPC: Major IT Players Explore Alternate Architectures and Interest Accelerates for FPGAs and Quantum Computing

this week in hpc

In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research look at FPGAs for high performance computing. After that, they discuss the latest news on quantum computing.

NSF Study to Probe Advantages of FPGAs for Deep Learning in Computer Vision

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The National Science Foundation is sponsoring a preliminary study to demonstrate the performance and power advantages of FPGAs over GPUs for Deep Learning in Computer Vision.

This Week in HPC: Altera Gives FPGAs a Floating Point Makeover and IBM Previews Power8 Portfolio

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In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research look at Altera’s FPGA floating-point makeover. After the break, they discuss IBM’s new POWER8 servers.

Micron Demos FPGA and Hybrid Memory Cube Interoperability

System designers can now evaluate the benefits of HMC with FPGAs and SoCs for next-generation computing.

Podcast: Radio Free HPC Looks at FPGAs

In this podcast, the Radio Free HPC team discusses the recent buzz surrounding FGPAs. After being sidelined by accelerators, they’re increasingly being used in appliances. Big vendors are talking about FPGAs not only for appliances but for general-purpose systems as performance assists. Are we headed back to the future? The guys discuss the ins and […]

Video: A Low-Latency Library in FPGA Hardware for High-Frequency Trading

In this video, John Lockwood from Algo-Logic presents: A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT). Recorded at the Hot Interconnects 2012 conference in Santa Clara. Current High-Frequency Trading (HFT) platforms are typically implemented in software on computers with high-performance network adapters. The high and unpredictable latency of these systems has led the […]

ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification

In this video, Jeffrey Fong presents: ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification. Packet classification is a fundamental enabling function for various applications in switches, routers and firewalls. Due to their performance and scalability limitations, current packet classification solutions are insufficient in addressing the challenges from the growing network bandwidth and the […]

Merrick6 FPGA Does HPC at 110 Watts

Enterpoint in the U.K. has announced their latest FPGA solution for HPC. With a desgin based around six Xilinx SpartanTM-6 FPGA processor cells, the Merrick6 offers a high performance, low power, processing solution all in a 2/3 size PCIe card format. The unique combination of FPGA and DDR3 resource in the Merrick6 processing cell allows […]

JP Morgan Fires Up Maxeler FPGA Super

Sooraj Shah writes that Investment bank JP Morgan has deployed a Maxeler dataflow supercomputer to manage the bank’s fixed income trading operations. Using FPGA technology, the system will be used for the analysis and profiling of intra-day trading risk. With the new Maxeler technology, JP Morgan’s trading businesses can now compute orders of magnitude more […]

Video: FPGA Accelerators at JP Morgan Chase

In this video, Peter Richards and Stephen Weston from J.P. Morgan present at the Stanford Computer Systems Colloquium on their use of Maxeler FPGA accelerator technology. As reported here recently, the company recently bought a 20 percent stake in Maxeler, a reflection of how strategic HPC has become on Wall Street.