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GPU Technology Conference Keynotes to Feature Pioneering Genomics Researcher and Chrysler Product-Design Visionary

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Today Nvidia announced its lineup of world-class keynote speakers for the fourth-annual GPU Technology Conference (GTC), which will be held at the McEnery Convention Center in San Jose, Calif., March 18-21.

  • Jen-Hsun Huang, Nvidia’s CEO and co-founder will discuss the profound and growing impact of GPU technology in gaming, science, industry, media and entertainment, design and other fields in an opening keynote address on Tuesday, March 19.
  • Erez Lieberman Aiden, a pioneering genomics researcher, will discuss his work sequencing the human genome in 3D, which allows scientists to gain deep insights into gene behavior and fundamental biological processes of life. Aiden will reveal how his team harnesses GPUs to accelerate the analysis of massive amounts of genomic information and simulate the physical process of genome folding, uncovering insights into gene expression that can now be used by thousands of researchers. The keynote will be on Wednesday, March 20.
  • Ralph V. Gilles, senior vice president of Product Design at Chrysler will provide a behind-the-scenes look at the auto industry, Gilles will review how GPUs are used to advance every step of the automobile development process — from the initial conceptual designs and engineering phases, through product assembly and marketing. He will also discuss how Chrysler Group uses GPUs and the latest technologies to build better, safer cars and reduce time to market. The keynote will be on Thursday, March 21.

GTC has become the single most important event for professionals who use GPUs to advance their work,” said Ujesh Desai, vice president of corporate marketing at Nvidia. “Our vision for creating this show was to give experts a platform to share their research with their peers — and GTC 2013 promises to be the best ever.”

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Tuesday, Nov 13 Livestream: GPU Technology Theater from SC12

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Live broadcast by Ustream

Starting at 10:30 am MDT today (Nov. 13), insideHPC will be streaming live presentations from the Nvidia GPU Technology Theater at SC12. They have an amazing lineup of speakers, and while they encourage you to come to booth #2217 and see for yourself, the company also wants to reach out to the many people who could not attend the show this year.

GPU Technology Theater Schedule @ SC12
(Booth #2217)
Tuesday, November 13, 2012

  • 10:30 Inside the Kepler Architecture, Stephen Jones, Nvidia
  • 11:00 Big Data Astronomical Data, Amr Hassan, Swinburne University
  • 11:30 Real-time Triggering Using GPUs, Felice Pantaleo, CERN
  • 12:00 Lattice Quantum Chromodynamics, Justin Foley, University of Utah
  • 12:30 FIM and NIM Weather Models, Mark Govett, NOAA
  • 13:00 OpenACC, John Urbanic, PSC
  • 13:30 Turbulence Visualization, Marc Treib, Technische Universität München
  • 14:00 MAGMA Linear Algebra Libraries, Jack Dongarra, University of Tennessee
  • 14:30 Beyond Tsubame 2.0, Satoshi Matsuoka, Tokyo Institute of Technology
  • 15:00 CUDA Development w/ NVIDIA Nsight , David Goodwin, Nvidia
  • 15:30 CUDA-Accelerated Libraries, Levi Barnes, Nvidia
  • 16:00 Thrust Parallel Algorithms Library, Thomas Bradley, Nvidia
  • 16:30 Compiling Parallel Languages w/ Numba, Mark Harris, Nvidia
  • 17:30 Improving Engineering Productivity, Ray Browel, ANSYS

Download the Full Schedule (PDF) and be sure to check out our live postings from the show every day this week.

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Livestream: GPU Technology Theater from SC12

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Live broadcast by Ustream

Starting at 7:00 pm MDT Tonight, (Nov. 12), insideHPC will be streaming live presentations from the Nvidia GPU Technology Theater at SC12. They have an amazing lineup of speakers, and while they encourage you to come to booth #2217 and see for yourself, the company also wants to reach out to the many people who could not attend the show this year.

GPU Technology Theater Schedule @ SC12
(Booth #2217)
Monday, November 12, 2012

19:30 Inside the Kepler Architecture , Stephen Jones, Nvidia
20:00 Evolution of GPU Computing , Steve Scott, Nvidia
20:30 Titan: ORNL’s New Computer , Buddy Bland, ORNL

Download the Full Schedule (PDF) and be sure to check out our live postings from the show every day this week.

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Live Stream: Nvidia Theater at SC12 to Feature Leaders in Science

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Nvidia is planning an amazing lineup of speakers in their GPU Technology Theater this year at SC12. And while they encourage you to come to booth #2217 and see for yourself, the company also wants to reach out to the many people who could not attend the show this year.

With science and engineering talks scheduled every 30 minutes during SC12, Nvidia will stream their theater presentations live, right here, on insideHPC!

Download the schedule (PDF) and be sure to check out our live postings from the show.

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Red Ink Deeper at SGI as Sales Shrink

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By Timothy Prickett MorganGet more from this author

Jorge Titinger, who was tapped to be the CEO at server and supercomputer maker Silicon Graphics back in February, has his work cut out for him amind slowing sales and mounting losses.

It is a situation that many CEOs at SGI (and at rival Cray) have found themselves in time and time again. But SGI is now in a new fiscal year and has a new product lineup based on the latest processors from Intel and Advanced Micro Devices, and hope is springing again that SGI can boost sales and get back in the black.

In the fourth quarter of fiscal 2012 ended in June, revenues declined by 8.2 per cent to $179.5m. Research and development costs (related in part to the adoption of Intel’s Xeon E5 processors in the Rackable and UV2 lines) rose a bit, and despite cutting other costs, the company had a $15.6m loss from operations. After paying taxes and interest, SGI dropped to a net loss of $18.4m, considerably deeper than the $12.1m loss in the year ago period.

For the full twelve months, SGI booked just under $753m in sales, up a very smart 19.6 per cent and far outpacing the server market at large, but the company lost $25.5m for the year, a few million bucks more than it did last year.

About half of that revenue increase came through the acquisition of SGI Japan, a former partner that the company absorbed in March 2011. The revenue hand looks good, but profits are not following suit. SGI has also burned $35m in cash in the past year and now has only $104.9m in the bank.

In the final quarter of the fiscal 2012 year, SGI’s product and services revenues were both off. Product revenues dropped 6.2 per cent to $134.5m, but services took a much more severe 13.8 per cent fall, to just under $45m.

Product gross margins fell by 3.8 points to 15.4 per cent, which was caused by a write-down of older product inventories and didn’t help the bottom line. Services gross margins rose by 1.8 points to 37.3 per cent. It was not enough to keep the losses at bay.

SGI has an $87m backlog of low-margin deals that it did to boost sales in prior quarters, and this is also weighing down profits at the company. About $15m of those deals booked in fiscal Q4, and another $20m will book in the coming quarter, according to Bob Nikl, the new CFO at SGI who came on board in May and who spoke with Wall Street analysts to go over the numbers.

By the second half of fiscal 2013, SGI will have a better and more profitable mix of business, said Nikl, adding that the goal was to get gross margins in the range of 30 per cent, plus or minus a few points, and operating margins into the mid-to-high single digits. In the short term, Nikl said to expect sales of between $180m and $190m in the September quarter and a GAAP net loss of between 34 and 42 cents per share.

Servers drove 88 per cent of product sales in the June quarter and storage drove 12 percent, unchanged from the March quarter. Servers represented $118.4m of sales and storage represented $16.1m in the June quarter.

Public sector customers – government agencies, research labs, and educational institutions – drove about half of revenues, with hyperscale data center and cloud customers driving 27 per cent of revenues. SGI had two customers who drove more than 10 per cent of revenues, and while they were not mentioned by name, one of them is usually retailing and cloud computing giant Amazon.

SGI has shipped one big UV 2000 shared memory supercomputer, launched in June in the wake of the Xeon E5-4600 processor announcements, to an unnamed US auto maker and has shipped two smaller ones in Europe – one to the UK Computational Cosmology Consortium at Cambridge University that is run by physicist Stephen Hawking.

About 80 per cent of SGI’s revenues were driven by direct sales, with the remainder coming from the channel. The United States accounted for 66 per cent of total sales, up a bit in terms of its slice of the pie, while overseas biz accounted for the other 36 per cent.

Like his predecessors, Titinger knows that it is going to take some time to get SGI focused and profitable.

“We recognize that this will be a journey,” Titinger said on the call.

But the task requires more than that, Titinger said. It requires focus – and calculating where SGI can get the most revenue and profit bang from its development buck.

To that end, Titinger is getting the 1,575 employees at SGI to focus more on vertical markets, not just generic hardware sales; to sell complete stacks of servers, storage, and software; and to get products out faster and at lower cost.

It might also mean selling its interconnect intellectual property to Advanced Micro Devices, Intel, or some other interested party, much as Cray just did selling its “Gemini” and “Aries” interconnects to Intel back in April for $140m.

SGI’s stock is up 27 per cent as El Reg goes to press, so Wall Street is clearly happy and it would have been a lot cheaper for Hewlett-Packard or Dell, which need a bigger footprint in supercomputing, to have bought SGI yesterday. But still, at a market capitalization of $274m, it would still be a pretty cheap way to get a three-quarter billion server biz that could be made profitable. ®

This article originally appeared in The Register. It appears here in its entirety as part of a cross-publishing agreement.

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IBM US Nuke-lab Beast ‘Sequoia’ is Top of the Flops (Petaflops, that is)

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By Timothy Prickett Morgan • Get more from this author

For the second time in the past two years, a new supercomputer has taken the top ranking in the Top 500 list of supercomputers – and it does not use a hybrid CPU-GPU architecture. But the question everyone will be asking at the International Super Computing conference in Hamburg, Germany today is whether this is the last hurrah for such monolithic parallel machines and whether the move toward hybrid machines where GPUs or other kinds of coprocessors do most of the work is inevitable.

No one can predict the future, of course, even if they happen to be Lawrence Livermore National Laboratory (LLNL) and even if they happen to have just fired up IBM’s “Sequoia” BlueGene/Q beast, which has been put through the Linpack benchmark paces, delivering 16.32 petaflops of sustained performance running across the 1.57 million PowerPC cores inside the box.

Sequoia has a peak theoretical performance of 20.1 petaflops, so 81.1 per cent of the possible clocks in the box that could do work running Linpack did so when the benchmark test was done. LLNL was where the original BlueGene/L super was commercialized, so that particular Department of Energy nuke lab knows how to tune the massively parallel Power machine better than anyone on the planet, meaning the efficiency is not a surprise. And the supercomputing lab was absolutely banking on the Sequoia machine’s power efficiency; the super-efficient beast burns only 7.89 megawatts to deliver that 16.32 petaflops of oomph.

The former top flopper on the list – the K massively parallel Sparc64-VIIIfx machine built by Fujitsu for the Japanese government, which shifts down to number two – had a sustained Linpack performance of 10.5 petaflops against a peak of 11.3 petaflops, for an impressive efficiency of 93.2 per cent. But this monster Sparc box sucks down 12.7 megawatts when it is running, or a mere 830 megaflops per watt. Sequoia is 2.5 times as energy efficient as K, at least when running Linpack.

Thus far, the largest hybrid CPU-GPU machine on the list, the Tianha-1A super at the National Supercomputing Center in Tianjin, China – which uses a mix of Intel Xeon X5760 processors and Nvidia Tesla M2050 GPU coprocessors – wastes 45.4 per cent of its aggregate number-crunching capability because of the hybrid programming model and the latencies in talking between the CPU and the GPU. The Tianha-1A, which delivers 2.57 petaflops of performance, only delivers 635 megaflops per watt. By contrast, the Sequoia machine is 3.25 times as energy efficient per unit of real work done – again, assuming that you consider Linpack indicative of real work.

The Top 500 list does not include the cost of the machines, which is also a very important factor. The BlueGene/Q machine costs millions of dollars per rack – IBM does not say how much precisely, since this is essentially a custom product – and can scale to 512 racks and up to 100 petaflops of aggregate peak performance. The trouble is, who has the estimated $1bn to build such a behemoth? Governments have a hard time coming up with that kind of cash these days, even if they do want to simulate nuclear weapons.

The point is that a real ranking of the world’s supercomputers would look at sustained performance, computational efficiency, performance per watt, and bang for the buck. Three out of four ain’t bad, but it also ain’t enough. (Moreover, the power draw figures are not available for all of the machines on the Top 500 list, so it is more like two-and-a-half out of four.)

LLNL awarded Big Blue the contract to build Sequoia back in February 2009. The massively parallel machine is based on IBM’s 18-core PowerPC A2 processor, which is a 64-bit chip that has one core to run the Linux kernel; one spare in case one goes dead; and 16 cores for doing compute tasks. One chip and 16GB of memory are packaged up on a compute card, while 32 cards are plugged into a node card – which has optical modules to link into the 5D torus that allows all the nodes to talk to each other. You put 16 of these node cards in a chassis with eight I/O drawers to make a half-rack midplane, and then stack two of these to make a rack.

The BlueGene/Q interconnect runs at 40Gb/sec and has a node-to-node latency hop of 2.5 microseconds. The logic for that 5D torus interconnect is embedded on the PowerPC A2 chips, which run at 1.6GHz, with 11 links running at 2GB/sec. Two of these can be used for PCI-Express 2.0 x8 peripheral slots. The 14-port crossbar switch/router at the center of the chip supports point-to-point, collective, and barrier messages and also implements direct memory access between nodes.

Like K and its “Tofu” 6D torus/mesh interconnect, this flagship BlueGene/Q super is no slouch on any dimension you want to measure. Fujitsu has commercialized the K super as the PrimeHPC FX10 line, which has a 16-core Sparc64-IXfx processor and which scales to 23 petaflops. The only problem is the all-out FX10 machine with 1,024 racks – that’s 98,304 compute nodes and 6PB of main memory – burns 23 megawatts and costs $655.4m at list price. That’s a big number, even for the HPC racket. (And no, it cannot play Crysis, and neither can BlueGene/Q. A Windows-based ceepie-geepie certainly could, so there is that to consider.)

IBM takes five out of the top 10

IBM is having a very good Top 500 this time around, with five of the top 10 systems bearing its stripey moniker.

Number three on the list behind the K super is another BlueGene/Q machine called “Mira,” which is installed at Argonne National Laboratory. This machine is essentially half of Sequoia.

Number four on the list is SuperMUC, another IBM box, but this one is based on Intel’s latest Xeon E5-2680 processors, which are plopped into IBM’s iDataPlex dx360 M4 rackish-bladish servers. SuperMUC was built by IBM under contract from the Partnership for Advanced Computing in Europe (PRACE) for the Leibniz-Rechenzentrum (LRZ) located in Germany. The SuperMUC contract was awarded in January 2011, and the neat thing about this box is that there are water blocks on processors and main memory on the iDataPlex system boards, and a closed-loop water-cooling system uses relatively warm water (up to 45 degrees Celsius, which is 113 degrees Fahrenheit) to keep these active components from overheating. (We’ll be taking a separate look at SuperMUC later.) SuperMUC cost $110.9m to build and operate over five years, according to the contract; the machine currently has 147,456 Xeon cores and delivers just under 2.9 petaflops of sustained performance on the Linpack test with a computational efficiency of 91 per cent. That’s pretty good, and is no doubt helped by the 56Gb/sec FDR InfiniBand network linking those iDataPlex nodes together. But the machine does burn 3.42 megawatts, so it only delivers 847 megaflops per watt. LLNL’s Sequoia is 2.44 times as energy efficient.

Number five is the Tianhe-1A machine that ceepie-geepie weighs in at 2.57 petaflops and which was the fastest machine in the world back in November 2010 and signaled the arrival of China as a contender in the exascale supercomputing arms race.

The “Jaguar” massively parallel supercomputer ranks sixth on the list and is installed at Oak Ridge National Laboratory, another nuke lab controlled by the US Department of Energy. Jaguar is in the process of being upgraded to the 20-petaflops “Titan” super ceepie-geepie. But this process is only just beginning, with nodes being upgraded by Cray to the latest Opteron 6274 processors and boosted with the latest “Gemini” XE interconnect and some of the nodes getting Nvidia Tesla M2090 coprocessors.

As it now stands, Jaguar has 298,592 cores and delivers 1.94 petaflops of sustained oomph (at a computational efficiency of 73.9 percent across those CPUs and GPUs), but Jaguar consumes an incredible 5.14 megawatts of electricity as it runs. That works out to only 377.5 megaflops per watt. At this point in the transformation from Jaguar to Titan, Sequoia is 5.5 times as energy efficient. That gap will close considerably as “Kepler” Tesla K20 GPUs are added to the Titan machine this fall and Oak Ridge takes advantage of GPUDirect and all ofthe funky innovations that Nvidia has put into these GPU coprocessors.

The rest of the best

Numbers seven and eight on the June 2012 Top 500 supers ranking are both BlueGene/Q machines. Number seven is nick-named “Fermi” and is installed at CINECA, a consortium of 54 universities in Italy that has a long history of buying IBM and Cray supers. The Fermi super has 163,830 cores and delivers 1.73 petaflops of sustained Linpack performance. Number eight is called “JuQueen” and is at Forschungszentrum Juelich (FZJ) in Germany. This machine is a 131,072-core BlueGene/Q that delivers 1.38 petaflops sustained on Linpack.

Groupe Bull’s “Curie” thin node machine – based on the Bullx B510 server nodes with Xeon E5-2680 processors and using 40Gb/sec InfiniBand interconnect – had 120,640 cores and delivered 1.27 petaflops of double-precision matrix math performance. This machine has a computational efficiency of 81.5 per cent, which is not bad, but it only delivers 603.7 megaflops per watt, which is not all that great in terms of energy efficiency. (But, if your code is tuned for x86 and InfiniBand, then maybe this is what matters more.)

Rounding out the top 10 is the “Nebulae” ceepie-geepie built by China’s Dawning for the National Supercomputing Center in Shenzhen. Nebulae pairs Xeon X5690 processors from Intel with Tesla M2050 GPU coprocessors from Nvidia. This machine came into the number two position on the June 2010 Top 500 list and is unchanged from that time. This box has 120,640 cores in total and delivers 1.27 petaflops of performance but burns a staggering 2.58 megawatts. Nebulae has a computational efficiency of only 42.6 per cent and delivers only 492.6 megaflops per watt.

Sequoia, as you would expect from a giant redwood tree, is being true to its name and setting the performance and efficiency bars pretty high in the HPC arms race.

Incidentally, the United Kingdom nearly edged into the top 10, with the 114,688-core BlueGene/Q machine nick-named “Blue Joule” at Daresbury Laboratory, weighing in at 1.21 petaflops and giving the lab the number 13 spot in the world Linpack rankings this time around. That’s a little shy of the 1.4 petaflops it was expecting and the number 10 ranking Daresbury was hoping for. The November 2012 list will have the “Blue Waters” XK6 hybrid CPU-GPU super from Cray on it as well as the fully upgraded Titan machine at Oak Ridge, so if nothing else changes, Daresbury needs to add a few hundred teraflops to make the top 10 this autumn.

Power on the rise, x86 slipping a bit

The Top 500 list is put together twice a year by Hans Meuer of the University of Mannheim; Erich Strohmaier and Horst Simon of Lawrence Berkeley National Laboratory; and Jack Dongarra of the University of Tennessee. It is not meant to be a performance benchmark on which to base acquisition decisions, but it is useful for seeing trends in system design and projecting how they might be more widely adopted in the broader HPC market in the near term and in the mainstream systems market over the long haul.

To get onto the Top 500 list this time around, a machine needed to hit at least 60.8 teraflops. The aggregate performance of the entire list comes to 123.4 petaflops, a 66.3 per cent increase from the aggregate 74.2 petaflops on the November 2011 Top 500 ranking and more than double the 58.7 petaflops of a year ago. This time around, there are 20 machines with 1 petaflops or more of floating point power, and they are clearly bringing up the class average. But so is the addition of more powerful machines, many with GPU coprocessors, lower down in the list.

Speaking of coprocessors, there are now 58 machines on the Top 500 list that use accelerators of one kind or another – up from 39 machines in the November 2011 list. Of those 58 machines, 53 use Nvidia Tesla GPU coprocessors, two use Advanced Micro Devices’ Radeon graphics cards, and two use IBM Cell processors. A year ago, there were only 17 machines with GPUs. This is beginning to smell like a ramp, much like when Linux took over as the operating system for supercomputers (more or less) in the late 1990s.

But Intel is starting to get in the game now, too; an Intel research machine code-named “Discovery” is ranked number 150 on the list. Discovery was built with Xeon E5-2670 processors stoked with “Knights Corner” MIC x86 coprocessors. This machine weighs in at 118.6 teraflops sustained against 181 peak teraflops on the Linpack test, and delivers 1,176 megaflops per watt.

Top 500 performance over time

Top 500 performance over time – pushing to exaflops

On the CPU front, 372 of the machines, or 74.4 per cent of those on the list, are based on Intel Xeon or Itanium processors, down slightly from the 384 machines on the November list and obviously impacted by the addition of a slew of BlueGene/Q iron as well as the delay in the roll-out of the Xeon E5 processors from last fall to this spring. Oddly enough, there are 246 machines using Intel’s prior Xeon 5600 generation processors – this is up from 240 six months ago. That said, there are 44 machines based on the Xeon E5s, compared to 10 on the November 2011 list when the machines were built using pre-launch processors with the blessing of Intel.

The current Top 500 has 58 Power-based machines, up from 49 six months ago. There are 63 clusters based on AMD’s Opteron processors (some with GPU coprocessors, some not), and that is 12.6 per cent of the pool. It is also the same number as on the November 2011 ranking.

In terms of core counts on the CPU side of machines, 74.8 per cent of the machines on the list have six or more cores. The average system on the list has 26,866 cores, up from an average of 18,383 six months ago and 15,520 a year ago. Average power consumption of a machine on the Top 500 is now 671 kilowatts, up from 634 kilowatts last November and 543 kilowatts last June.

In another interesting turn, the number of InfiniBand-based machines now is larger than the number of Gigabit Ethernet machines on the Top 500 list. There were 208 InfiniBand machines driving 31.5 of aggregate petaflops compared to 207 Gigabit Ethernet machines driving 13.3 petaflops in total.

IBM had 213 systems on the June 2012 Top 500 list, which is 42.6 per cent of installed systems. Big Blue has 47.6 per cent of installed capacity as gauged in flops. Hewlett-Packard, which doesn’t pursue high-end machines generally, had 138 machines on this list, down from 141 six months ago – giving it 27.6 per cent of systems on the current list. Cray has 5.4 per cent of the base; followed by Appro International at 3.6 per cent; Silicon Graphics at 3.2 per cent; and Groupe Bull at 3.2 per cent as well.

IBM and HP pretty much have a lock on commercial HPC customers; together the two firms account for 247 of the 249 machines not going into government or academic labs. ®

This article originally appeared in The Register. It appears here in its entirety as part of a cross-publishing agreement.

 

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AMD Gooses the Clocks on ‘Bulldozer’ Opterons

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By Timothy Prickett Morgan • Get more from this author

Chip giant Intel has been hogging all of the headlines lately in the server racket lately, and Advanced Micro Devices this morning is trying to get a word in edge-wise with some clock speed bumps on its “Bulldozer” family of processors for server with one, two, or four sockets.

Don’t get too excited, though. This is not a rev on the Bulldozer core or anything like that, but rather just the normal deep bin sorting that AMD always does a few months after the initial release of a chip as the wafer baking process matures and, generally, as a reaction to whatever Intel is doing at the time.

The Opteron 4200 (for servers with one or two sockets) and 6200 (for servers with two or four sockets) launched back in November, ahead of Intel’s “Sandy Bridge” Xeon E5 assault in March and April and got the jump on Intel at the low-end with its Opteron 3200s for single-socket microservers in March, ahead of the Intel “Ivy Bridge” Xeon E3-1200 v2.

AMD, under new CEO Rory Read and a whole new management team, is not trying to get the jump on Intel so much as get partner GlobalFoundries to predictably ramp its 32 nanometer processes and get on track to the next process nodes in the roadmap, so AMD can better compete against the current and future Xeons and forthcoming “Centerton” Atom processorsaimed at servers.

There are two new “Interlagos” Opteron 6200 processors and three new “Valencia” Opteron 4200 processors, and all of them are just deep bin sorts on the chips coming out of GlobalFoundries, Michael Detwiler, product marketing manager at AMD, tells El Reg.

The entry Opteron 3200s are not being refreshed at this time, and Detwiler was not at liberty to divulge if there are going to be other speed bumps in the current Bulldozer family of Opterons before the next-generation “Piledriver” cores and their related Opterons come to market, perhaps starting later this year. If recent history is any guide, this is the last hurrah for the Bulldozers and AMD is focused on getting its new cores etched and baked onto the future Opteron 3300 (“Delhi”), 4300 (“Seoul”), and 6300 (“Abu Dhabi”) processors for the existing C32 and G34 processor sockets and SR5600 chipsets.

Here is the current Opteron 6200 lineup and how it stacks up against the prior Opteron 6100s:

Updated AMD Opteron 6200sUpdated AMD Opteron 6200s; new chips in bold italics 

As is usually the case, it is debatable if the extra oomph in the chips that come out of the deep-bin sorts is worth the money that AMD is charging. (The same holds true for Intel’s Xeons.) But in this case, if you are a high freaky trading company or HPC center than needs an extra couple hundred megahertz and you have money to blow, these chips are possibly for you.

The Opteron 6284 SE (short for Special Edition and burning 140 watts of juice) runs at 2.7GHz, a 3.8 per cent jump in clock speed. But that extra 100MHz costs $1,265, which is 24.1 per cent more than a 2.6GHz Opteron 6282 SE running at 2.6GHz and costing $1,019. You really need those clocks on those 16 cores to pay that premium.

That said, you get 16 threads running at 2.7GHz, and that is still faster than the top-bin Xeon E5-2470 part from Intel for two-socket boxes, which runs at 2.3GHz with eight cores and 16 threads with HyperThreading turned on for $1,440. The faster E5-2670 processor from Intel runs at 2.7GHz with eight cores, in a 130 watt power envelope, and costs $1,723; the E5-2690 burns at 135 watts and runs at 2.9GHz across its eight cores, but costs $2,057. If you want a four-socket machine, a Xeon E5-4650, which runs at 2.7GHz and is also rated at 130 watts, costs a staggering $3,616.

With those price differentials, you can see now why some HPC shops looking for fat server nodes or those using heavy virtualization on their x86 iron are going for the Opterons.

Still, that new 16-core Opteron 6728 that runs at 2.4GHz is only 100MHz faster than the Opteron 6276, which is a 4.3 per cent bump, but it costs 25.5 per cent more. You are going to need the cash and a pretty good reason to justify that money. Perhaps the new AMD management is wishing they had not cut prices quiet so low on the Bulldozer Opterons and is trying to make up for it a little?

AMD is adding three new chips in its Opteron 4200 lineup:

Updated AMD Opteron 4200sUpdated AMD Opteron 4200s; new chips in bold italics 

That Opteron 4240 chip, which is a standard 95 watt part, runs at 3.4GHz, which is a respectable 9.7 per cent faster than the next SKU down the line, but it costs 81.6 per cent more. The Opteron 4276 HE (which is short for Highly Efficient and meaning it is a low-voltage part) is 20.7 per cent more costly than its nearest sibling in the Bulldozer family, but only adds 4 per cent on the clock speed.

AMD’s announcement calls the Opteron 4230 a regular part, but with it only consuming 65 watts and running at 2.9GHz, is looks like an HE part to El Reg and that is why we put it in that part of the table.

The Opteron 4200s don’t have SE parts, and there have been no updates to the Extremely Efficient (EE) very low voltage Opterons. If you want super low power consumption, then the 1.6GHz eight-core Opteron 4256 EE is your only option for a two-socket server. Depending on the workload and the memory requirements, a single-socket Opteron 3200 processor, which is less expensive but which has fewer cores in the 45 watt thermal band, might be a better option than an Opteron 4256 EE. ®

This article originally appeared in The Register. It appears here in its entirety as part of a cross-publishing agreement.


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ISC’12 Announces Keynote Speakers

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This week the International Supercomputing Conference announced its keynote speaker lineup for ISC’12. The event will be held June 17-21 in Hamburg and is expected to draw 2,400 attendees from academia, research institutions and industry around the world.

ISC’12 keynote speakers:

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National HPCC Conference Kicks Off March 26-28 in Newport

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The National HPCC Conference has released their meeting agenda for their event coming up March 26-28 in Newport, RI. The theme for the 2012 conference is “Supercomputing: A Global Perspective.”

The National High Performance Computing and Communications Council is a professional society dedicated to exchanging information, discussing technical issues and transferring technology within the HPCC community.We emphasize communication between manufacturers and users, as well as academics and the government agencies which establish policy and regulate the use of advanced technologies. When you review the agenda and visit the exhibits, I think you’ll agree that this year’s lineup of prominent speakers fulfills our mission.

Early Bird Registration rates end on February 25, 2012.

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Video: SGI Ramps up for SC11 and Big Hadoop Clusters

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In this video, SGI’s CMO Franz Aman previews the company’s updated product lineup for SC11. Today the company rolled out its next-gen ICE X Scale-Out Blade HPC Cluster, which was previously known as project Carlsbad 3.0.

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Update: Booth Previews and Theater Schedules at SC11

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I spent the last decade planning booth theaters at Sun and I think we had more fun than anybody. For this year, we thought it would be good to give you some previews of the SC11 theatre circuit.

  • The Dell Booth theater has speakers from some of the leading universities in the nation. Download the Dell Theater Schedule (PDF). Learn more at SC11 Booth #2040.
  • Fujitsu’s Theater will showcase science being done on the K Computer as well as partner talks at Booth #815.
  • IBM will have their Watson system on the at Booth #4517 on the sixth floor for those of you wanting to play Jeopardy. They also have listed a number of demos and briefing topics on their SC11 site.
  • Internet2 will feature a number of heavy-hitter guest speakers in Booth, #1327.
  • Mellanox will feature theater presentations and session talks on FDR InfiniBand from leading server and storage OEMs, ISVs, end-users and academia. See them at Booth #522.
  • Pacific Northwest National Labs will showcase their HPC expertise with a number of featured talks at SC11 Booth #1103.
  • PRACE, the European HPC Infrastructure folks, have some featured talks at SC11 and they invite you to their Booth #5001 on the 6th floor.
  • QLogic just sent us their theater schedule, which is loaded with talks on InfiniBand and  next-gen fabrics.
  • TACC has a stellar lineup of speakers set for their booth theater as well as related SC11 sessions. Check them out at Booth #323.

Got a theater at SC11? Send us your schedules at news @ insideHPC.com.

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IBM Opens Power8 Kimono – Wafer Baked in 22 Nanometers

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By Timothy Prickett Morgan • Get more from this author

Last May El Reg gave you the little information we were able to gather on the impending Power7+ and future Power8 processor designs and their possible announcement dates in Power Systems machines.

Data was a little thin, and intentionally so on the part of Big Blue. But with Oracle kicking up a big fuss over Intel‘s Itanium processor roadmap – which the software giant says is a dead end – it looks like IBM has decided it was time to be more specific.

Only a little bit more specific, mind you. Server makers and chip makers don’t like to make promises because business conditions change and issues crop up in reality that can cause a processor or server design and its schedule to diverge from the roadmap.

A case in point is one of the earlier schedules for the Power processor lineup, which had Power6 coming out in 2006, Power6+ in 2007, Power7 in 2008, and Power7+ in 2009. That was a two-year cadence for a new processor design and a two-year cadence for a chip manufacturing process shrink interwoven.

For reasons that IBM never explained, and which no doubt had to do with its wafer baking plant in East Fishkill, New York, and maybe its 65 nanometer processes as well as reduced competition from Intel and Sun Microsystems (now part of Oracle) in the high-end server racket, Big Blue lengthened the cadence by 50 per cent ahead of the Power6 launch. Also the Power6+ was not whatever it was supposed to be.

Power(6+) failure?

Our guess is Power6+ was supposed to be a quad-core chip, perhaps implemented in a 45 nanometer process, but it was nothing to write home about. (In fact, IBM tried to pretend that Power6+ chips, which had a few new instructions and a modest speed bump, were actually Power6 chips to avoid talking about whatever had gone wrong.)

With the Power7 chip, IBM has committed to a three-year cadence for major processor designs and is back to using a process shrink halfway through the cycle with a modest design change. This is what IBM calls a 36-month “revolution” with an 18-month “+ evolution” embedded in the Power roadmap, and it is analogous to Intel’s “tick-tock” meter with Core desktop and Xeon server processor launches.

In May we asked Steve Sibley, director of product management for the Power Systems line, if there would be a Power7+ processor; he confirmed that indeed there would be one.

The Power7+ chips will be socket-compatible with the Power7s, although IBM is making unspecified I/O enhancements to the chips that will require that customers move to Power7+ system boards to make use of them.

My guess is that the embedded InfiniBand that IBM uses to link to remote I/O drawers will be goosed (perhaps to 40Gb/sec QDR or 56Gb/sec FDR InfiniBand from the current 20Gb/sec DDR InfiniBand) and the system boards and/or chips will sport PCI-Express 3.0 peripheral controllers. At the time, we suggested that IBM would strongly want to use 32 nanometer processes on the Power7+ and use the shrink to crank the clocks.

As you can see from the latest Power roadmap, that looks to be the plan:

IBM Power processor roadmap

IBM’s latest Power chip roadmap (click to enlarge)

In the latest roadmap, IBM shows that the Power7+ chip will indeed use a 32 nanometer process, down significantly from the 45 nanometer process used with the Power7 chips thatfirst came to market in February 2010 and were rolled up and down the Power Systems line through August of last year.

The updated roadmap says that the Power7+ chips will run faster, and will include a “very large cache” and “accelerators.” Of course, the Power7 chips already have a 32MB on-chip L3 cache implemented in embedded DRAM.

My guess is the shrink to 32 nanometer will allow IBM to crank the clocks on the processors by 25-30 per cent. IBM could boost the eDRAM cache size, but that may require a lot of redesign work, and the whole point of the “evolution” part of the cycle is to not mess with the design too much. It is almost certain that IBM will stick with four, six, and eight core variants with the Power7+ chips.

I know what you are thinking: 18 months after February 2010 is August 2011, and last time I looked at my calendar, it was August 2011. But then again, I think the original plan was to get the initial Power7 machines out the door in April 2010 for May delivery, not February, which should put the Power7+ launch in October or November.

That should more or less coincide with Intel’s “Sandy Bridge” Xeon E5 processor launch, which is slated for the fourth quarter. IBM originally planned to start with the Power 750 and Power 770 in April 2010 and the Power 720 and PS7XX blades and high-end Power 795 in October 2010.

IBM widened the product line considerably and also pulled the announcements forward by several months to catch the recovery wave from the Great Recession and to get its launches in phase with X64 processor launches from Advanced Micro Devices and Intel.

And what of Power8?

The previous external roadmap I got my hands from inside IBM didn’t say much about the Power8 processor – which we should expect in the spring of 2013 or so – except that it was in the “concept phase.” The latest roadmap sheds some light on what IBM’s chip designers have cooking.

We can tell you that with the Power8 chip IBM is skipping a 28 nanometer process and jumping right to 22 nanometers, and that the high-level design for the chip is complete and in the implementation phase (where the kinks are being worked out in the design and the manufacturing processes).

IBM’s roadmap says the Power8 chip will have more cores, larger caches, more accelerators than the Power7 and Power7+ chips as well as a fourth generation of the company’s simultaneous multithreading (SMT).

It is a mystery how many cores IBM will put on the Power8 chip, but the shrink from 45 nanometer to 22 nanometer processes should allow for as many as 16 cores to be on a single Power8 chip – depending on the cache size and desired clock speed, of course.

IBM could try to crank clocks a little more and cut back to a dozen cores and fatter caches, depending on how it thinks the typical AIX and IBM i workload will make use of the cores. A Power8 system should offer roughly twice the oomph of a Power7 machine in the same class, socket for socket. ®

This article originally appeared in The Register. It appears here in its entirety as part of a cross-publishing agreement.

 

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HPC News with Snark for Friday, Aug. 19, 2011

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Summer is going by way too fast, so we went out to catch Troll Hunter at the brewhouse cinema for some mindless fun this week. The DVD comes out next week, so don’t miss it! Now back to work; here’s the HPC News with Snark for Friday, Aug. 19, 2011:

  • Hot Conference! We’ll be at Hot Interconnects. There’s still time to register and get a leg up on next-gen networking technologies. The event will be held at Intel’s World HQ in Santa Clara August 24-25, with tutorials on the 25th.
  • A Funny Thing Happened on the Way to the Forum. The HPC User Forum has a great lineup with speakers from CEA, ERDC, HECToR, LANL, NERSC, ORNL and more. The event will take place September 6-7 in San Diego. Register now.
  • Healthcare’s Big Pain: Big Data. Compliance has made Big Data one giant pain in the butt for the healthcare industry.


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IBM Goes with Mellanox 10GigE

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This week Mellanox announced that its ConnectX-2 EN 10 Gigabit Ethernet NICs and mezzanine adapter cards are available on IBM System x and BladeCenter servers.

“Our customers are looking to meet the challenges of today’s dynamic world, contain costs, deal with IT skill shortages and take full advantage of new performance-based technologies,” said Roland Hagan, vice president of System x servers at IBM. “IBM System x and BladeCenter servers, with Mellanox ConnectX-2 EN 10 Gigabit Ethernet NICs, provide leading performance, energy efficiency, scalability and manageability for a wide variety of applications that our clients demand in today’s business and government settings.”

The popularity of the IBM platforms makes this a significant win for Mellanox, who have added an array of 10GigE products to their lineup recently with the acquisition of Voltaire.

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HPC User Forum to Feature Planetary Scientist, April 5-7 in Houston

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As one of the longest-running symposiums in high performance computing, the HPC User Forum continues in Houston next month with an excellent lineup of speakers April 5-7. The meeting will feature renowned NASA Planetary Scientist Dr. Everett Gibson, Jr., an acclaimed speaker who has appeared on PBS, the Discovery Channel, National Geographic and the History Channel.

Other Forum topics of interest include: Data-intensive computing in the life sciences, HPC and environmental modeling, Oil & Gas best practics, and Exascale computing. Check out the Forum Agenda for more information.

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