Entries filed under “Events”

Announcements of upcoming events in HPC and reports from conferences, meetings, and workshops.

Slidecast: ScaleMP Update on Server Aggregation

In this slidecast, Shai Fultheim from ScaleMP provides an update on the company’s virtualization software solutions for HPC. The company is preparing a big announcement at ISC’12. You can hear some of the details here or check out their booth #303 in Hamburg.

The innovative Versatile SMP (vSMP) architecture aggregates multiple x86 systems into a single virtual x86 system, delivering an industry-standard, high-end symmetric multiprocessor (SMP) computer. Using software to replace expensive custom hardware and components, ScaleMP offers a new, revolutionary computing paradigm.

Download the MP3Download the slides (PDF). Subscribe on iTunes * If Dropbox is blocked, download from this Google page.

Also posted in HPC, HPC Software, ISC12, Podcast, Video | Leave a comment

ISC’12 Ramps up to 175 Exhibitors

The good folks at ISC’12 are out with their latest newsletter and it looks like this year’s exhibition will be a record breaker with a total of 175 companies and research organizations from around the world. The conference runs June 17-21 in Hamburg, Germany.

Hot Topics at ISC’12:

  • Energy Efficient HPC Centers
  • Future Heterogeneous Architectures
  • Supercomputer Architectures for Data Intensive Applications
  • Alternative Processors, Architectures and Multidisciplinary Applications
  • Best Practices of Large-Scale Applications across Industries
  • Petascale Systems in the World and their Applications
  • Application Performance: Lessons learnt from Petascale Computing
  • Critical Aspects of High Performance Networking
  • The Realities and Challenges of HPC in the Cloud
  • Exascale Computing: Where we are?
  • Networking/Interconnect within HPC-Systems
  • Parallel File Systems
  • Computational Chemistry
  • HPC for Small and Medium Sized Enterprises

At insideHPC, we are proud to join the ranks of 54 first-time exhibitors at ISC’12. Look for the Red Hat and be sure to stop by and say hello.

Also posted in HPC, ISC12 | Leave a comment

Video: Programming Heterogeneous Many-cores Using Directives

In this Part 1 of this video, Francois Bodin from CAPS presents: Programming Heterogeneous Many-cores Using Directives.

Directive-based programming is a very promising technology to deal with Many-Core. In this context, HPC users can rely on emerging standards such as OpenACC and OpenHMPP. CAPS will introduce OpenACC and HMPP directive-based programming models with companion tools (e.g. for tracing, tuning, debugging): HMPP Wizard, CULA, ArrayFire, Vampir, Paraver, DDT, CodeletFinder, etc. The speakers will provide insights on how GPU / CPU can be exploited in a unified manner and how code tuning issues can be minimized. The discussion will also cover the use of libraries which is essential when addressing Many-Core Programming. Pathscale will present its product supporting OpenHMPP programming model.

Recorded at GTC 2012 in San Jose. Download the slides (PDF).

In Part 2 of this video (starting at the 30 minute mark) Christopher Bergstrom from Pathscale presents: Pathscale Enzo. ENZO is a complete GPGPU and multi-core solution, which tightly couples the best programming models with highly optimizing code generation for Nvidia Tesla. Download the slides (PDF).

Also posted in GTC - GPU Technology Conference, HPC, HPC Software, Video | Leave a comment

May 24 Webinar: How Do You Make Grid Engine Faster?

In HPC, speed is everything. Join Univa’s Bill Bryce, VP Products for an all new webinar about how to make Grid Engine faster. You’ll learn about Univa Grid Engine 8.1 and the new features that translate into speed and productivity — and how they affect your business.

Each webinar will be less than 30 minutes, so you can get the practical information you need quickly.

Webinar Times :

  • Thursday, May 24: 13:00 – 13:30 (EDT / UTC/GMT -5 hours)
  • Thursday, June 15: 10:00- 10:30 (CEST/ UTC / GMT +1 hour)

Register now.

Also posted in HPC, HPC Software, Podcast | Leave a comment

Video: GTC 2012 Full Keynote

Last week, Nvidia CEO Jen-Hsun Huang rolled out the new Kepler GPUs at his GTC 2012 keynote. And while this video is available elsewhere in pieces, we thought it would be worthwhile to stitch it together as one streaming movie for our readers.

Note: Many of the GTC 2012 talks are now available as streaming video, and we plan to highlight some of our favorites in the coming days.

Also posted in GPUs, GTC - GPU Technology Conference, HPC, HPC Hardware, Video | Leave a comment

Video: GPUs Accelerate Risk Analysis for Financial Services

In this video, Pierre Spatz from Murex and Alastair Houston from Nvidia discuss how GPUs are being successfully used to run financial risk analysis at higher speeds and for less cost. Recorded at GTC 2012 in San Jose.

Also posted in GPUs, GTC - GPU Technology Conference, HPC, HPC Hardware, Video | Leave a comment

July HPC User Forums in London and Stuttgart

At insideHPC, we are pleased to announce that we will co-sponsor two HPC User Forum meetings in Europe in July. The first meeting is at Imperial College London on July 5-6 and the second meeting is at the HLRS/University of Stuttgart on July 9-10. Registration is free and refreshments will be served.

The HPC User Forum was established in 1999 to promote the health of the global HPC industry and address issues of common concern to users. The organization has grown to 150 members. It is directed by a volunteer Steering Committee of HPC users from government, industry and academia, and is operated for the users by market analyst firm IDC.

The meetings will include presentations on Big Data, Blue Waters, regional supercomputing, and more. Read the Full Story.

Also posted in HPC, HPC User Forum | Leave a comment

Student Cluster Competition Comes to ISC’12


Clipped from: www.hpcadvisorycouncil.com (share this clip)

 

One of the most exciting additions to ISC’12 this year is the Student Cluster Competition. The goal: derive the most possible application performance using less than 3000 watts.

The competition will feature small teams that compete to demonstrate the incredible capabilities of state-of- the-art high-performance cluster hardware and software. In a real-time challenge, teams of six undergraduate and/or high school students will build a small cluster of their own design on the ISC exhibit floor and race to demonstrate the greatest performance across a series of benchmarks and applications. The students will have a unique opportunity to learn, experience and demonstrate how high-performance computing influence our world and day-to-day learning. Held in collaboration of the HPC Advisory Council and ISC, the Student Cluster Competition is designed to introduce the next generation of students to the high performance computing world and community.

The Teams:

Our intrepid reporter, Dan Olds will be there covering the play-by-play. Read the Full Story.

Also posted in HPC, ISC12 | Leave a comment

Webinar: NSF Big Data Solicitation May 21

On May 21, The National Science Foundation and the National Institutes of Health will host a webinar on their joint Core Techniques and Technologies for Advancing Big Data Science & Engineering solicitation. This webinar is designed to describe the goals and focus of the BIGDATA solicitation, help investigators understand its scope, and answer any questions potential Principal Investigators may have.

The BIGDATA solicitation aims to advance the core scientific and technological means of managing, analyzing, visualizing, and extracting useful information from large, diverse, distributed and heterogeneous data sets so as to: accelerate the progress of scientific discovery and innovation; lead to new fields of inquiry that would not otherwise be possible; encourage the development of new data analytic tools and algorithms; facilitate scalable, accessible, and sustainable data infrastructure; increase understanding of human and social processes and interactions; and promote economic growth and improved health and quality of life.

Update: The webinar audio is now available for replay. Download the slides (PDF).

Also posted in HPC, inside-BigData, Video | Leave a comment

Interview: Author Rob Farber on the Secret Sauce for Programmers in the Kepler GPU

In this video, Rob Farber discusses new features in the Nvidia Kepler GPUs that make it easier for programmers to maximize application performance. Recorded at GTC 2012 in San Jose.

Farber’s book, CUDA Application Design and Development was the best-selling title at SC11 and at GTC 2012 this year. The book is designed to meet the needs of working software developers who need to understand GPU programming with CUDA and increase efficiency in their projects.

Also posted in GPUs, GTC - GPU Technology Conference, HPC, HPC Hardware, HPC Software, Video | Leave a comment

New Whitepaper: NVIDIA’s Next-Gen CUDA Compute Architecture – Kepler GK110

If you still looking for more details on the new Kepler GPUs, Nvidia has stepped up with a new GK110 Architecture whitepaper for you.

Comprising 7.1 billion transistors, Kepler GK110 is not only the fastest, but also the most architecturally complex microprocessor ever built. Adding many new innovative features focused on compute performance, GK110 was designed to be a parallel processing powerhouse for Tesla and the HPC market. Kepler GK110 will provide over 1 TFlop of double precision throughput with greater than 80% DGEMM efficiency versus 60‐65% on the prior Fermi architecture. In addition to greatly improved performance, the Kepler architecture offers a huge leap forward in power efficiency, delivering up to 3x the performance per watt of Fermi.  

Is the news all good? Blogger Paul Caheny writes that the K10 in particular continues a disturbing downward trend on memory capacity per FLOPs.

A couple of high level observations on how this fits into general HPC architecture trends. Firstly the ratio of memory capacity and memory bandwidth to compute is likely to continue to decrease, signifying the increasing necessity to make use of strong scaling in applications rather than the previously rich seam of weak scaling. K10 represents a more than 60% fall in Bytes/FLOPs (memory capacity per FLOPs) compared to M2090 and a reduction of 50% in Bytes/sec/FLOPs (memory bandwidth per FLOPs) compared to M2090 (both using SP FLOPs as per K10′s target market). It will be interesting to see what the corresponding numbers are for the upcoming K20.

Download the whitepaper (PDF).

Also posted in GPUs, GTC - GPU Technology Conference, HPC, HPC Hardware | Leave a comment

IDC Breakfast Briefing at ISC’12 on June 18

IDC will host its annual Analyst Briefing and Breakfast at ISC’12 on June 18 in Hamburg. You can join IDC’s Earl Joseph, Steve Conway, and Chirag Dekate as they present their expert insight and analysis on the evolving HPC market. This session will examine the drivers and inhibitors impacting the HPC Technical Server market and provide IDC’s latest forecasts.

The event starts at 8:00am in the CCH-Congress Center Hamburg (Hall B). Register now.

Also posted in HPC, ISC12 | Leave a comment

GPUs Power Penguin Computing, from HPC to Cloud and on to the Enterprise

In this video, Tom Coull from Penguin Computing describes the company’s GPU-powered computing solutions for HPC. Penguin On Demand has offered GPUs in the Cloud for years, and the recent Kepler GPU announcement from Nvidia is figuring prominently in Penguin’s plans.

Coulll also describes Penguin Computing’s move to provide enterprise customers with the same powerful server and storage solutions that have powered its HPC customers.

Also posted in Compute, GPUs, GTC - GPU Technology Conference, HPC, HPC Hardware, Video | Leave a comment

End-users Need to Design Exascale Computers

 

It’s not size that counts but what you do with your supercomputer, delegates to the GPU Technology Conference in San Jose were told on 16 May.

End-user scientists and engineers need to get involved from the outset in the design of the next generation of machines – expected to be capable of delivering performance in the Exaflop range by the end of this decade – if they want the machines to produce useful scientific and engineering results.

Historically too much emphasis has been put on supercomputer hardware and not enough attention paid to the application software that would run on the machines to produce the results that scientists and engineers want. So during a session on ‘Exascaling your apps’, Steve Scott, the chief technology officer of Nvidia, which organised the conference, warned that if exascale machines were to have a broad impact: ‘We need a wake-up call.’ He did not think that system software would be an issue in the Exascale domain but rather: ‘I’m worried about application software.’

At present, no-one quite knows what the hardware will be for a successful Ex scale machine and this opens up an unprecedented opportunity for end users to get involved in ‘co-design’, Satoshi Matsuoka of the Tokyo Institute of Technology told the session. ‘Co-design will be the big key,’ he said. Because the architectures of the processors and the systems for Exascale computing are not yet fixed, he said, co-design is needed to reflect the needs of the end-user applications in the architectures themselves, right from the outset.

He pointed out that even at the Petaflop level, ‘It has been a challenge to run efficient applications. Scaling up has been a challenge because of the transition to many core and heterogeneous architectures.’ Steve Scott endorsed the point saying that although today’s applications will run on a future Exaflop machine: ‘Will they run well? No!’

The US Department of Energy has already set up three co-design initiatives, according to Jeff Vetter of Oak Ridge National Laboratory. They will be focusing on the areas of Combustion, Materials Science, and Nuclear Power. ‘In the past, the applications teams have been tossed new architectures and told to get on with it,’ he said. Now, in contrast, designers have to tell the users early on what the possibilities might be.

This story originally appeared on HPC Projects. It appears here as part of a cross-publishing agreement with Scientific Computing World.

Also posted in Exascale, GTC - GPU Technology Conference, HPC | Leave a comment

GPUs Power Part-Time Scientists’ Plan for Lunar Rover Autonomy

Today at the GTC 2012 conference, a team calling themselves the Part-Time Scientists presented plans for their GPU-powered lunar rover entry in the Google Lunar X Prize.

The autonomous navigation system of Asimov is a major technological leap. While the Russian Moon rovers Lunokhod 1 and 2 in the early 70s were fully controlled from Earth, today’s Mars rovers like NASA’s Mars Exploration Rover “Opportunity”, which has been tirelessly exploring the Red Planet since 2004, are autonomous. However, Opportunity requires nearly three minutes to process a pair of images – a delay that causes it to move at an average speed of just 1 cm/sec or less. New developments by the technology partnership between the DLR Institute of Robotics and Mechatronics (RMC) and the PTS have created, for the first time, an autonomous navigation system for a rover that has the capacity to process multiple images per second. The technology boosts a stereo camera that Asimov will use to calculate its own motion, generate a 2.5-dimensional environmental model, evaluate the site and determine a collision-free path – all in real time.

Read the Full Story.

Also posted in Compute, GTC - GPU Technology Conference, HPC, HPC Hardware | Leave a comment

Advertisement

ClusterStor Ad

View All Videos

insideHPC.com is a production of insideHPC, LLC. © 2006-2011 Sitemap