In this video, Rick Wagner and Erik Parreira from the San Diego Supercomputing Center describe a gaming competition they ran on a multi-panel display at the SDSC booth at SC14.
“A crazy idea was born at ISC14 while answering questions about the new energy metrics in Allinea Performance Reports and Allinea MAP – could the information in these reports show us an easy way to increase energy efficiency without having to change the program? The idea was to use CPU frequency scaling to run memory-bound jobs at a lower clock frequency. In Lazy Energy Efficiency Challenge One, I found that on a synthetic benchmark I could increase the iterations per watt by 19% on a memory-bound code.”
“NREL’s HPC center is home to the largest HPC system in the world dedicated to advancing renewable energy and energy efficiency technologies. In addition, the HPC data center is one of the most energy efficient data centers in the world, featuring warm-water liquid cooling, and waste heat capture and re-use to reduce energy use and lower costs.”
In this special guest feature, Penguin Computing Chief Technology Officer Phil Pokorny writes that Open Compute Project has great potential to spark HPC innovation. In just three and a half years since Facebook announced the Open Compute Project (OCP), the cooperative industry effort is showing exceptional progress toward delivering significantly more efficient hardware into the […]
In this podcast, the Radio Free HPC team discusses a new Paypal project that is leveraging TI Keystone DSP processors for systems intelligence. “Paypal has developed a novel approach to systems intelligence. By analyzing their chaotic real-time server data, they can produce organized, intelligent results using HP’s Moonshot server powered by TI DSP processors.”
“PayPal’s novel approach is to convert events represented in a plain text format into a numeric format which can be analyzed in real-time using mathematical techniques with hardware specifically designed to operate on such numeric data. The first instantiation of this approach uses ProLiant m800 cartridges powered by TI’s 66AK2Hx DSP processor.”
“In terms of the hardware, one of the biggest successes surely was to make the Intel Xeon Phi boot via the Extoll network. This might not sound so special, but for the DEEP project it is – because this basically is the essential milestone for proving our architectural concept: The Cluster-Booster approach. In traditional heterogeneous architectures the accelerators cannot boot without a host CPU. Our aim was to develop a cluster – made up of usual CPUs – and a booster – made up of accelerators – that can both act autonomously while being interconnected via two networks.”