Registration is now open for the 2013 Richard Tapia Celebration of Diversity in Computing Conference to be held Feb. 7-10 in Washington, D.C. “Early Bird” discounts of $75 off the regular registration fees are available through Sunday, January 13.
The 2013 conference is the seventh in the series and brings together diverse leading researchers to present state-of-the art topics in the field of computing. Confirmed speakers for Tapia 2013 include Vint Cerf (Google VP and ACM President), Armando Fox (UC Berkeley), Anita Jones (University of Virginia), Jeanine Cook (New Mexico State University), Annie Anton (Georgia Tech), and Hakim Weatherspoon, (Cornell University), and Theresa Maldonado (National Science Foundation), among others.
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Will the next generation of HPC Programmers learn their chops online? Over at PC Pro, David Bayon writes that a set of new Startups are successfully teaching programming skills through web-based courses.
The idea of learning online isn’t new and it won’t suit all subjects, but here it makes sense: ask an expert programmer how they learned their craft and most will say they progressed with hands-on experience. A sense of active involvement is key, so these online schools place interaction at the heart of their lesson plans, their site design and even their growth strategies.
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In these days of pervasive multicore computing, no one would argue the importance of teaching parallel programming skill to our young people. Now Dr. Tom Crick from Cardiff Metropolitan University writes that its time to change the focus from just writing code to developing the crucial thinking skills and the ability to solve problems.
Computational thinking means creating and making use of different levels of abstraction, to understand and solve problems more effectively; it means thinking algorithmically and with the ability to apply mathematical concepts to develop more efficient, fair, and secure solutions; it means understanding the consequences of scale, not only for reasons of efficiency but also for economic and social reasons. And this is why it is important to teach computer science in schools: we need to embed principles and theory to develop a deeper conceptual understanding of how technology works and how it can be leveraged to solve problems. There is a quote commonly misattributed to Edsger Dijkstra: “Computer science is no more about computers than astronomy is about telescopes.” — this is where computational thinking fits in, abstracting away the technology.
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Last week at SC12, Colfax International was showcasing their new CXP9000, giving the public its first look at a 4U server with up to 8 Intel Xeon Phi coprocessors and 16 Xeon cores. The system boasts nearly 8 Teraflops of peak double precision performance for HPC applications.
Colfax has consistently been first to market with innovative solutions that maximize performance for our customers in high performance computing (HPC) and enterprise segments,” said Gautam Shah, CEO, Colfax International. “Thanks to our close relationship with Intel and engagement in the early testing program, Colfax is uniquely qualified and positioned to provide a complete portfolio of products to support the Intel Xeon Phi coprocessor.”
This week Solarflare, the leader in application-intelligent 10GbE networking software and hardware, announced the launch of its Solarflare University Program for the Solarflare ApplicationOnLoad™ Engine (AOE). Providing access to the AOE hardware and development kits at a substantial educational discount allows the Solarflare University Program to offer FPGA-based products for classroom instruction in computer science and computer engineering and helps to pioneer advances in Customized Compute. Solarflare also announced the Innovation Awards to encourage and reward research, innovation, and application development in the field of Customized Compute.
The Solarflare University Program and the Innovation Awards are examples of how private industry and universities can work together to better educate our students about new technologies and equip them with the latest tools and knowledge,” said Melissa Smith, assistant professor, Holcombe Department of Electrical and Computer Engineering at Clemson University. “The Future Computing Technology Laboratory at Clemson University is dedicated to research in reconfigurable computing and providing our researchers and students with an advanced computing infrastructure [and] we look forward to working with Solarflare and being a part of the University Program.”
As the first installation to deploy the new MIC technology at large scale in the forthcoming Stampede supercomputer, TACC and partners will soon begin offering training workshops, technical documentation, and academic content to help the research community rapidly develop applications using Intel’s new Xeon Phi coprocessors.
MIC’s support of standard programming languages and tools allow almost any code to be compiled for MIC and natively executed on MIC,” explained TACC research staff member Lars Koesterke. “In fact, since the Xeon Phi development environment supports native C/C++ and Fortran cross-compilation and direct login access to the coprocessor, the porting process is generally very straightforward.” Koesterke notes, however, that optimization efforts should still be considered after initial porting to maximize vectorization and parallel efficiencies on this new architecture. These are focus areas of early TACC training and documentation.
In December and January, leading up to the launch of Stampede on January 7, both TACC and Cornell will offer training, first to early users and then to anyone interested in learning about the new technology. Information from the training will be made available online, helping to prepare the research community for Stampede. This will be followed by a new course at The University of Texas at Austin on hybrid programming for heterogeneous systems like Stampede.
For more details, read the Full Story or check out the TACC booth #1511 at SC12.
Today Colfax International announced a new set of developer training programs for the new Intel Xeon Phi coprocessor. As part of the course material, Colfax Developer Training (CDT) will discuss the applicability of the Intel many-core technology, demonstrate the programming models for Intel Xeon Phi coprocessor including native execution and offload-based approaches, and provide extensive optimization techniques.
As developers look to quickly and efficiently harness the power of the Intel Xeon Phi coprocessor, Colfax is excited to announce a complete development solution including wide range of training programs for both novices and experts, complemented by professional workstations,” said Gautam Shah, CEO and President of Colfax International. “We have worked with Intel’s Xeon Phi team for close to two years, acquiring significant expertise and are therefore uniquely qualified and positioned to provide Intel Xeon Phi training and systems for highly parallel computing workloads.”
Colfax will demonstrate the Intel Xeon Phi coprocessor based developer workstation and registering attendees for their training class at SC12 show in the Colfax booth #2409 and a theater presentation, “Maximizing Performance with Intel Xeon Phi Coprocessor” at the Intel booth #2601. Read the Full Story.
- Getting Started with CUDA on Monday, November 12, 2pm – 3:30pm.
- Massively parallel NVIDIA GPUs provide the bulk of the computing power behind many of the World’s top supercomputers. This talk will start with the basic architecture of the GPU and introduce the CUDA parallel computing platform. The basic principles of massively parallel computing will be introduced using simple source code examples of CUDA C and C++. Learn about the latest software and tools, from where to download and install, to how to get started writing your own parallel code in Linux, Mac or Windows environments. Register now.
- Accelerating Your Applications with the Kepler Architecture on Monday, November 12, 4pm – 6pm.
- The recently introduced Kepler architecture offers a wealth of new features to assist programmers developing applications on the GPU and help them achieve unprecedented performance. While many of these features are leveraged transparently by the NVCC compiler and the CUDA software tool chain, programmers can support these tools by targeting the Kepler architecture with their software design. The goal of this presentation is to provide CUDA developers with an understanding of the key concepts of the Kepler architecture and demonstrate how they can be used in real world applications. After a review of the Kepler architecture and a brief introduction of general GPU optimization strategies, we will present an in-depth look at Kepler features targeting both coarse-grain and fine-grain parallelism, including dynamic parallelism, Hyper-Q, warp shuffle and more. This will provide CUDA developers with the necessary background to make the optimal design choices for Kepler. Register now.
Despite all the great features outlined above, the (mis)perception is that Python is too slow for HPC Development. While it is true that Python might not be the best language to write your tight loop and expect a high percentage of peak flop rate, it turns out that Python has a number of tools to help switch those lower-level languages.
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Attention students: Applications are now being accepted for scholarships to attend the 2013 Richard Tapia Celebration of Diversity in Computing Conference to be held February 7-10, 2011 in Washington, D.C.
The deadline for applications is Dec. 15, 2012. Scholarships covering travel, hotel accommodations, meals, and conference registration are being provided to assure the attendance of those who would otherwise be unable to attend and ensure diversity in conference attendance.
In addition to featuring presentations by some of the leading names in fields related to computing, the Tapia conferences are characterized by their collegial and supportive atmosphere,” said Tapia 2011 General Chair David Patterson, professor of computer science at the University of California, Berkeley. “Tapia conferences are often the first professional meetings many of our students attend and these scholarships help ensure that those who could benefit most from such a conference but may not be able to afford it will still have an opportunity to participate.”
Organized by the Coalition to Diversify Computing, the Tapia conference honors the significant contributions of Richard A. Tapia, a mathematician and professor in the Department of Computational and Applied Mathematics at Rice University in Houston, Texas, and a national leader in education and outreach programs. The Tapia Conferences brings together people in CS&E from all educational levels, backgrounds, and ethnicities to celebrate and support the accomplishments of this diverse community.
This week EADS Innovation Works announced an international HPC coding contest for students.
Called “Join the Spirit,” this competition challenges students on solving real-life problems coming from aeronautics and systems applications. The participants can submit their codes which they will test live on a dedicated website: http://jointhespirit.eads.com. The fastest code that solves the problem will be awarded a $10,000 prize, along with receiving recognition from professional scientists and researchers at EADS.
The contest runs until December 31, 2012. Students may work the problem-solving on their own, or in teams of up to three persons. Read the Full Story.
This week Nvidia announced its 12th annual Graduate Fellowship Program, which advances the frontiers of science by awarding grants and providing technical support to graduate students who are doing outstanding GPU-based research.
The relationship NVIDIA fosters with university researchers through its fellowship program provides a conduit for ideas and technology to flow between academia and industry. In addition to financial sponsorship, the fellowship affords student researchers a unique opportunity to cultivate a dialogue with the finest engineering minds in the industry. As a recipient of the NVIDIA Fellowship, I am grateful that the financial and intellectual support I receive from NVIDIA ensures my research is useful and relevant to the graphics industry at large.”- Jared Hoberock, Research Team, Former NVIDIA Fellow
As many as 10 grad students will be selected to win $25K for research in parallel computing. Applications are due January 15, 2013. Read the Full Story.
In this video, Tim Mattson from Intel gives a lecture on Open MP basics.
We introduce OpenMP; an industry standard API for programming shared memory computers. OpenMP provides a simple path for programmers to get started with parallel programming. In this lecture, we’ll focus on the core features of the original versions of OpenMP.
The other day my friend Trey was lamenting that there was nothing at the library for novices on high performance computing. Well, the good news is that Douglas Eadline wrote such a book a few years ago with the help of AMD and Sun Microsystems.
In simple terms, HPC enables us to first model then manipulate those things that are important to us. HPC changes everything. It is too important to ignore or push aside. Indeed, HPC has moved from a selective and expensive endeavor to a cost-effective technology within reach of virtually every budget. This book will help you to get a handle on exactly what HPC does and can be. High Performance Computing For Dummies, 2nd AMD Special Edition is intended for anyone who has heard about the many benefits of using HPC (such as streamlining processes or saving money). This book explains what HPC is and shows how it can help you or others within your company.