Entries filed under “Co-processors”

Intel has been careful to label the Xeon Phi as a coprocessor, something that always pairs with a Xeon CPU. But how does their performance compare on real applications? Over at the Xcelerit Blog, Paul Sutton benchmarks both devices using an optimized parallel version of the Monte-Carlo LIBOR swaption portfolio pricer.

It is executed once on the host CPUs (the Sandy Bridge processors), and again on the Xeon Phi co-processor in offload mode. The execution time of the full application is measured, including data transfers, random number generation, and reduction. All these steps are running on the target processor.

As we can see, from about 100K paths onwards, the Intel Xeon Phi becomes faster than the Sandy Bridge processors, reaching nearly 3x at 1M paths. With lower numbers of paths, the Sandy Bridge outperforms the Phi. This can be explained by the added data transfers and the comparably low level of parallelism for a low number of paths (considering both vectorization and multi-threading). The setup time for the random number generator also becomes more dominant on the Xeon Phi when there is relatively little computation performed.

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The Genome Analysis Center (TGAC), one of seven institutes that receives funding from the UK’s Biotechnology and Biological Sciences Research Council (BBSRC), has deployed two Convey HC-1ex hybrid-core systems for advanced genomics research.

TGAC, based in the UK, is an aggressive adopter of advanced sequencing and IT technology. The two Convey HC-1ex systems are the latest addition to TGAC’s powerful computing infrastructure. By installing hybrid-core Convey HC-1ex systems, TGAC expanded its cluster and ccNUMA-based HPC environment to include leading-edge heterogeneous computing capabilities.

We need to analyse data quickly and precisely, which takes time on clusters,’ explained Mario Caccamo, deputy director of TGAC. “We offloaded some of our sequence alignment demand to the Convey hybrid-core systems, because they can handle the alignment algorithms much more efficiently. Using the Convey systems, we are seeing up to 15 times acceleration on our computationally intense BWA runs.”

TGAC was part of an international team that recently demonstrated next-generation sequencing could be used effectively to fine map genes in polyploidy wheat. TGAC will leverage Convey’s architecture to accelerate computationally challenging jobs, such as resequencing alignment for wheat and other polyploidy species.

The initial performance jump is a major improvement,” continued Caccamo. “We expect to achieve even better performance as we gain experience using the Convey platform.”

This story appears here as part of a cross-publishing agreement with Scientific Computing World.

In this guest feature, Intel’s John Hengeveld reviews the past year and looks ahead to the industry challenges HPC is facing 2013.

Happy New Year Everybody!  For me, 2012 was very exciting and very stressful. On the one hand I had family engagements, graduations, the launch of Intel® Xeon® E5 processors, the launch of Intel® Xeon Phi™ brand and first products, strong competitive moves in the industry. On the other hand I dealt with my illness, my brother-in-laws accidental death, and the aforementioned launches and new products.

I started 2012 by predicting that it would be the year of “Practical Petascale” and expected 20 petascale class machines – I under-called by 3 – and that they would be working on real applications (they are). I predicted we would start to see the technology gnomes cranking on the dawn of the exascale era. We saw Intel, nVidia and IBM all make a statement about what the next step in exascale would look like. Intel made some key acquisitions and delivered the Intel® Xeon Phi™ products. I am excited Intel announced these coprocessors reached generally availability on 1/28. So now, pretty much anybody can get one from his or her favorite OEM.

I mentioned my four challenges to exascale – Programmability; Reliability; Efficiency, and System Scalability (PRESS) and we made very visible headway on all but Reliability. The OpenMP standard moved forward on a solid standard for attached co-processing.  According to the top500 list, the industry has substantially improved its performance per watt. System Scaling solutions are starting to coalesce. On the Reliability front, there have been a few items of interest, but I haven’t seen as much as I think we need.

2013 is shaping up to be a corker in technical computing with more new products from Intel and others, and major new system deployments globally. There will be maybe 50+ Petascale systems – maybe more.

The biggest challenges to come this year:

• The industry has been going at a breakneck pace for the past couple of year. I expect this to continue through 2013; I am worried that the software industry is falling behind in capabilities and services.
• I expect that this year will see much greater convergence and intersection between the role of the workstation in visualization and design and the role of HPC in simulation and modeling.  This fact alone should expand the technical computing markets, but we still need to converge on means for cloud access and standards for clusters relationships with workstations.
• I think that industrial investment will pick up substantially.  Competition requires computation. And Big Data Analytics will grow beyond the initial Hadoop models into something much more powerful in the long term. Defining that standard will be a big challenge as well.
• We had better see more traction on the system reliability front.

Quite a year last year – An Amazing year this year. I love this industry. I really do.