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Supercomputing Moves Closer to Predicting Earthquakes

Pioneering simulation of the 1992 7.3M Landers earthquake

“Working in close collaboration with Intel Labs Parallel Computing Lab, performing a series of architecture-aware optimizations, the team was able to scale the complexity of science and sustained performance to an unprecedented level. SeisSol sustained 8.6 PFLOPS (double precision), almost equivalent 8.6 quadrillion calculations per second when processing seismic wave phenomena using half of the Tianhe-2 supercomputer.

NERSC Leads Next-Generation Code Optimization Effort

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“We are excited about launching NESAP in partnership with Cray and Intel to help transition our broad user base to energy-efficient architectures,” said Sudip Dosanjh, director of NERSC, the primary HPC facility for the DOE’s Office of Science. “We expect to see many aspects of Cori in an exascale computer, including dramatically more concurrency and on-package memory. The response from our users has been overwhelming—they recognize that Cori will allow them to do science that can’t be done on today’s supercomputers.”

This Week in HPC: Searching for Scalability in China and Tracking Criminals in Canada

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In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research discuss recent reports that the Tianhe-2 supercomputer is underutilized. After that, they look at Canada’s efforts to track criminals using Big Data.

New Whitepaper: File I/O on Intel Xeon Phi (RAM disks, VirtIO, NFS, and Lustre)

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“This paper provides information and benchmarks necessary to make the choice of the best file system for a given application from a number of the available options: RAM disks, virtualized local hard drives, and distributed storage shared with NFS or Lustre. We report benchmarks of I/O performance and parallel scalability on Intel Xeon Phi coprocessors, strengths and limitations of each option.”

This Week in HPC: Intel Maps Omni Scale Future and IBM Moves InfiniBand to the Cloud

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In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research discuss the new Intel Omni Scale Fabric as well as IBM’s plans plans to add an InfiniBand high-speed data transfer option to its SoftLayer cloud before the end of the third quarter of 2014.

Porting to Accelerators with Hybrid Fortran

Hybrid Fortran unified code: Separate loop structures for CPU and GPU, automatic code conversion to higher dimensions when needed.

Over at Typhoon Computing, Michel Müller writes programmers looking to port their code to accelerators now have a new tool called Hybrid Fortran. “This python-based preprocessor parses annotations together with your Fortran code structure, declarations, accessors and procedure calls, and then writes separate versions of your code – once for CPU with OpenMP parallelization and once for GPU with CUDA Fortran.”

Radio Free HPC does the ISC’14 Wrapup Show

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In this podcast, the Radio Free HPC team reviews the highlights from ISC’14 including Intel’s new Omni Scale Fabric and the World’s First 100Gb/s EDR InfiniBand Switch from Mellanox.

Can Nvidia Outsmart Intel in HPC?

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Over at the Motley Fool, Srdjan Bejakovic writes that Nvidia and Intel are battling it out in the HPC space. But before you go off and invest, insideHPC wants to make sure you know the rest of the story.

Intel Adds Vector Instructions for Knights Landing

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James Reinders writes that additional vector instructions have now been documented for Intel AVX-512, which will be first implemented in the future Intel Xeon Phi processor and coprocessor known by the code name Knights Landing.

Farber to Teach All-Day Tutorial At SC14

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Over at TechEnablement, Rob Farber writes that he will be teaching an all-day tutorial “From ‘Hello World’ to Exascale Using x86, GPUs and Intel Xeon Phi Coprocessors” (tut106s1) at SC14 in New Orleans. The tutorial takes place on Sunday November 16, 2014.