Despite having over 6,000 Intel Xeon Phi coprocessors, TACC’s Stampede system is seeing extremely low utilization of these coprocessors.
In this video from the 2013 Hot Interconnects Conference, Krishna Kandalla presents: Designing Optimized MPI Broadcast and Allreduce for Many Integrated Core (MIC) InfiniBand Clusters. The emergence of co-processors such as Intel Many Integrated Cores (MICs) is changing the landscape of supercomputing. The MIC is a memory constrained environment and its processors also operate at […]
In this video, Intel’s Martyn Corden presents: Compilation for Intel Xeon Phi. “This two day webinar series introduces you to the world of multicore and manycore computing with Intel Xeon processors and Intel Xeon Phi coprocessors. Expert technical teams at Intel discuss development tools, programming models, vectorization, and execution models that will get your development […]
In this video from ISC’13, Jim Jeffers from Intel discusses the new Intel Xeon Phi product family and how programmers can take advantage of parallelism to optimize applications performance. Jeffers is the co-author of the book, Intel Xeon Phi Coprocessor High Performance Programming. Authors Jim Jeffers and James Reinders spent two years helping educate customers […]
In this video from ISC’13, Stephen Chenoweth from Intel describes the latest additions to the Intel Xeon Phi coprocessor family. You can watch Intel’s product announcement right here on insideHPC and check out more from the show at our ISC’13 Video Gallery.
In this video from ISC’13, Hans-Christian Hoppe from Intel describes a space weather simulation powered by Intel Xeon Phi coprocessors.
In this video from ISC’13, Raj Hazra from Intel presents: Driving Industrial Innovation on the Road to Exascale. Join Intel for a look at the state of the HPC industry from two perspectives. First, we’ll look at how innovations in HPC are driving innovation in manufacturing industries with energy and automotive industry leaders providing examples. […]