“To be successful in high-performance computing (HPC) today, it is no longer enough to sell good hardware: vendors need to develop an ‘ecosystem’ in which other hardware companies use their products and components; in which system administrators are familiar with their processors and architectures; and in which developers are trained and eager to write code both for the efficient use of the system and for end-user applications. No one company, not even Intel or IBM, can achieve all of this by itself anymore.”
In this video from SC15, Rich Brueckner from insideHPC moderates a panel discussion on the NSCI initiative. “As a coordinated research, development, and deployment strategy, NSCI will draw on the strengths of departments and agencies to move the Federal government into a position that sharpens, develops, and streamlines a wide range of new 21st century applications. It is designed to advance core technologies to solve difficult computational problems and foster increased use of the new capabilities in the public and private sectors.”
Today D-Wave Systems announced that Los Alamos National Laboratory will acquire and install the latest D-Wave quantum computer, the 1000+ qubit D-Wave 2X system. Los Alamos, a multidisciplinary research institution engaged in strategic science on behalf of national security, will lead a collaboration within the Department of Energy and with select university partners to explore the capabilities and applications of quantum annealing technology, consistent with the goals of the government-wide National Strategic Computing Initiative.
Today Los Alamos, Lawrence Berkeley, and Sandia national laboratories announced the Alliance for Application Performance at Extreme Scale (APEX). The new collaboration will focus on the design, acquisition and deployment of future advanced technology high performance computing systems.
The EU-funded DEEP Project has unveiled their innovative HPC platform: a 500 TFlop/s prototype system that implements a Cluster-Booster concept that has a lot in common with a turbocharged engine. The prototype operates with a full system software stack and programming environment engineered for performance and ease of use.
In this special guest feature from the Print’n Fly Guide to SC15 in Austin, Scot Schultz from Mellanox writes that a new era of Co-Design will pave the way to Exascale. “Exascale computing will undoubtedly include three primary concepts: heterogeneous systems, direct communication through a more sophisticated intelligent network, and backward/forward compatibility. Co-Design includes these concepts in order to create an evolutionary architectural approach that will enable Exascale-class systems.”
In this special guest feature, Tom Wilkie from Scientific Computing World reports that the European Commission is funding research projects and centers of excellence as part of its strategy to coordinate European HPC efforts. In October, the EC made a series of announcements on how it is going to invest some of the €700 million allocated to its Public-Private Partnership on high performance computing.
Pacific Northwest National Laboratory has opened the CENATE Center for Advanced Technology Evaluation, a first-of-its-kind computing proving ground. Designed to shape future extreme-scale computing systems, CENATE evaluations will mostly concern processors; memory; networks; storage; input/output; and the physical aspects of certain systems, such as sizing and thermal effects.
Today Cray announced the creation of the Cray Europe, Middle East and Africa (EMEA) Research Lab. The Cray EMEA Research Lab will foster the development of deep technical collaborations with key customers and partners, and will serve as the focal point for the Company’s technical engagements with the European HPC ecosystem.
Can 3D-stacking technology topple the long-standing “memory wall” that’s been holding back HPC application performance? A new paper from the Barcelona Supercomputing Center written in collaboration with experts from Chalmers University and Lawrence Livermore National Laboratory concludes that it will take more than just the simple replacement of conventional DIMMs with 3D-stacked devices.