In this video from GTC 2012, Jack Wells, Director of Science at ORNL introduces a series of talks on the research that will be accelerated by the hybrid Titan supercomputer.
The whole system is an upgrade,” said Jack Wells in describing how Oak Ridge’s current Jaguar supercomputer is being transformed into Titan. ORNL is transitioning from Cray’s XT5 compute blades to their XK6 compute blades, which use hybrid chipsets comprised of AMD Opteron CPUs and NVIDIA Tesla GPUs. Application benchmarks conducted thus far have demonstrated that the XK6 is yielding performance improvements ranging from 50 percent to 230 percent compared with the XT5.
The following talks comprised the rest of the session:
This is a big step forward in educating the programmers of the future on GPU computing. It gives students access to a robust and powerful debugging tool within their institution’s budget,” added David Luebke, senior director of research and head of academic research programs at NVIDIA.
The pack contains annual subscriptions to a classroom-sized set of CUDA scalar workstation licences, white papers on debugging CUDA, and complete lecture notes suitable for introductory CUDA debugging and hands-on walkthrough examples and exercises. Read the Full Story.
Last week, Nvidia CEO Jen-Hsun Huang rolled out the new Kepler GPUs at his GTC 2012 keynote. And while this video is available elsewhere in pieces, we thought it would be worthwhile to stitch it together as one streaming movie for our readers.
Note: Many of the GTC 2012 talks are now available as streaming video, and we plan to highlight some of our favorites in the coming days.
In this video, Pierre Spatz from Murex and Alastair Houston from Nvidia discuss how GPUs are being successfully used to run financial risk analysis at higher speeds and for less cost. Recorded at GTC 2012 in San Jose.
Nvidia has announced the launch of an accelerator designed to meet what it describes as the two most difficult challenges in high-performance computing.
The Tesla K10 is aimed at seismic data processing in oil and gas exploration, as well as signal and image processing in the defence industry. The company claims it is based on the fastest, most efficient and highest-performance computing architecture ever built.
The Kepler architecture enables two high-performance Tesla K10 GPUs to be placed on a single accelerator board. It delivers an aggregate performance of 4.58 teraflops of single-precision floating point and 320 gigabytes per second memory bandwidth.
Seismic processing uses large data centers to crunch through petabytes of information about the Earth’s subsurface area, generated from reflected seismic waves. Geophysicists analyse the resulting 2D and 3D images to discover oil and gas deposits, and to determine the best and safest locations to drill.
In addition, the Tesla K10 can help agencies increase national security by improving the quality, and speeding the delivery of, actionable video analytics and image forensics to security and law-enforcement officials.
GPUs speed up by as much as 100 times the process of analysing thousands of video feeds generated by security cameras and drones, enabling analysts to better identify events and individuals of interest.
In this video, Rob Farber discusses new features in the Nvidia Kepler GPUs that make it easier for programmers to maximize application performance. Recorded at GTC 2012 in San Jose.
Farber’s book, CUDA Application Design and Development was the best-selling title at SC11 and at GTC 2012 this year. The book is designed to meet the needs of working software developers who need to understand GPU programming with CUDA and increase efficiency in their projects.
If you still looking for more details on the new Kepler GPUs, Nvidia has stepped up with a new GK110 Architecture whitepaper for you.
Comprising 7.1 billion transistors, Kepler GK110 is not only the fastest, but also the most architecturally complex microprocessor ever built. Adding many new innovative features focused on compute performance, GK110 was designed to be a parallel processing powerhouse for Tesla and the HPC market. Kepler GK110 will provide over 1 TFlop of double precision throughput with greater than 80% DGEMM efficiency versus 60‐65% on the prior Fermi architecture. In addition to greatly improved performance, the Kepler architecture offers a huge leap forward in power efficiency, delivering up to 3x the performance per watt of Fermi.
Is the news all good? Blogger Paul Caheny writes that the K10 in particular continues a disturbing downward trend on memory capacity per FLOPs.
A couple of high level observations on how this fits into general HPC architecture trends. Firstly the ratio of memory capacity and memory bandwidth to compute is likely to continue to decrease, signifying the increasing necessity to make use of strong scaling in applications rather than the previously rich seam of weak scaling. K10 represents a more than 60% fall in Bytes/FLOPs (memory capacity per FLOPs) compared to M2090 and a reduction of 50% in Bytes/sec/FLOPs (memory bandwidth per FLOPs) compared to M2090 (both using SP FLOPs as per K10′s target market). It will be interesting to see what the corresponding numbers are for the upcoming K20.
In this video, Tom Coull from Penguin Computing describes the company’s GPU-powered computing solutions for HPC. Penguin On Demand has offered GPUs in the Cloud for years, and the recent Kepler GPU announcement from Nvidia is figuring prominently in Penguin’s plans.
Coulll also describes Penguin Computing’s move to provide enterprise customers with the same powerful server and storage solutions that have powered its HPC customers.
A solution to the problem of antibiotic-resistant bacteria may be closer, as a result of a computer science project to investigate ways of making legacy software run efficiently on heterogeneous systems, the Nvidia GPU Technology Conference was told on 16 May.
Simon McIntosh-Smith, of the University of Bristol in the UK, presented results from a project that ported a very large molecular modelling program to systems with a mix of conventional CPUs and also GPUs. One early result has been the identification of around ten small molecules that could block the biological pathway that creates antibiotic resistance in bacteria. So confident are the researchers in their predictions that the candidate drug molecules are now being synthesised in the laboratory.
Typically, biomolecules such as proteins can be made up from between a thousand and two thousand atoms, whereas the docking molecules, the ligands, will be an order of magnitude smaller – about 50 to 100 atoms. The software is BUDE – the Bristol University Docking Engine – is used to predict the structure of small molecules that can bind tightly to the active sites in large biological molecules. It processes tens of millions of candidate ligands and uses a genetic algorithm-like methodology to select those that bind most tightly, using energy minimisation calculations. It is, said McIntosh-Smith, a very large piece of code, in the region of hundreds of thousands of lines of Fortran. However, only a few thousand lines needed to be ported across to GPU processors.
Because the ten million or so ligands all come in slightly different flavours – they have flexible side chains, for example – the project represents “an embarrassment of parallelism,” he continued. “When we get down to one molecule, we want to test it in many different positions and rotations, so we have even more parallelism.”
Only two results are outside the desirable bounds, so ‘we are now getting very accurate simulation results,’ McIntosh-Smith said. By porting the code across to a heterogeneous CPU+GPU system, he reported a factor of 20 increase in the speed of computation and a factor of 10 improvement in energy efficiency.
The simulation to try to find ligands that would block recently emerged antibiotic-resistance in a bacterium found in Asia took four days and surveyed more than 8 million candidate molecules. Once, he pointed out, it would have taken the biggest and fastest supercomputers in the world to do the calculation, which can now be done by a university research group.
Our GTC 2012 coverage continues with Dan Olds’s report on the rapid spread of Cuda and GPU computing. One measure is its increased presence the annual Supercomputing Conference series.
This story is perhaps best told via pictures. In this first picture, we’re looking at the booth layout of the SC07 show floor in Reno. Like a typical SC show, there were a few hundred exhibitors ranging from hardware, software, and service vendors to academic institutions, research labs, and government research organizations. The sole presence of hybrid computing is the tiny green dot at the upper left of the schematic. It’s NVIDIA’s small booth – the lone beachhead for GPU-accelerated HPC. Fast-forward four years and… look at the progress. The SC11 show floor diagram is literally covered with green squares and rectangles.”
Our GTC 2012 coverage continues as Dan Olds examines the growth of the CUDA environment from 150,000 downloads in 2007 to 1.5 million today:
More importantly, there are 35 NVIDIA-fueled hybrid supercomputers on the Top500 list today. The NDUT Tianhe-1A system, with 14,300 CPUs and 7,100 NVIDIA GPUs, held down the top spot on the list in 2010. The upcoming Oak Ridge Titan system will sport more than 18,000 CPUs alongside 18,000 GPUs, and should become the fastest supercomputer in the world sometime this fall.”
The details on Dynamic Parallelism were hard to find after the new feature was introduced as part of the GTC 2012 keynote yesterday. Now Nvidia has followed up with a short whitepaper that describes how it works.
Dynamic Parallelism in CUDA is supported via an extension to the CUDA programming model that enables a CUDA kernel to create and synchronize new nested work. Basically, a child CUDA Kernel can be called from within a parent CUDA kernel and then optionally synchronize on the completion of that child CUDA Kernel. The parent CUDA kernel can consume the output produced from the child CUDA Kernel, all without CPU involvement.
Cleaning up and enhancing video is a tall order, compute-wise… But I just saw a demo of that in a GTC12 session run by MotionDSP. Their specialty is processing video streams from mobile platforms (think drones and airplanes) on the fly. We’re talking full motion, 30 frames per second video streams that are enhanced, cleaned up, and highly analyzable in real time. The amount of processing they’re doing is incredible. Lighting is enhanced, edges are enhanced, jitter is taken out, and the on-screen metadata (time, location, speed, etc.) is masked… The effect is profound. In the demo, what was once just a vague gray ship (which seemed to be vibrating like a can in a paint shaker) was clarified so that you could easily see what kind of ship it was and also see two suspicious figures milling around on deck. To me, it looked like there were enough pixels to enhance the video even further – to the point where we could identify the figures.”
This week BOXX Technologies is demonstrating their 3DBOXX workstation computers featuring NVIDIAMaximus technology at GTC 2012. Maximus technology enables engineers to complete simulation or rendering plus visualization simultaneously on the same workstation.
In the past, content creation that employed both visual design and physical simulation often resulted in these tasks occurring on different systems or at different times,” said Shoaib Mohammad, BOXX VP of Marketing and Business Development. “Our integration of NVIDIA Maximus technology enables users of Autodesk, NVIDIA iray, SolidWorks, CATIA, Bunkspeed and other professional applications to design and render simultaneously resulting in a faster, seamless workflow essential to increasing productivity.”
In this special guest feature, Tom Wilkie from Scientific Computing World clears his head from all the technical information gathered at yesterday’s GTC2012 keynote.
The latest processor from Nvidia will lead to ‘the democratisation of computing happening in front of us,’ according to Jen-Hsun Huang, president and chief executive of the company.
He unveiled the new chip, known as ‘Kepler’, to an audience of nearly 3,000 scientists and engineers at Nvidia’s GPU Technology Conference in San Jose, California, on 15 May. It was, he said, more than three times as energy efficient as its predecessor.
Nvidia specialises in the graphics processing units, as one of the major suppliers of computer graphics cards to PCs but the technology is now widely used as an accelerator in high performance computers. Kepler was, he said, the most energy efficient GPU ever built and he expected it to advance high-performance computing, computer graphics and cloud computing. In HPC, he said, ‘We know that ultimate performance is limited by energy efficiency and at the chip architecture level we have had to design for energy efficiency and this is a huge step forward.’
Among the applications in HPC that he demonstrated was a massive simulation of the collision between our own galaxy, the Milky Way, and the nearby Andromeda galaxy – an event expected some three billion years or so into the future. The simulation involved a many-body problem of millions of gravitationally interacting stars – a highly intensive computational problem.
But according to Sumit Gupta, head of Nvidia’s Tesla high-performance computing business, supercomputing will be the beneficiary of the other applications for the Kepler chip – in gaming, virtualisation and cloud computing. It is because Nvidia has such a strong presence in these high-volume consumer markets that it is able to produce its processors so cheaply. And it is this aspect, according to Gupta that is leading to the ‘democratisation of high performance computing’ proclaimed by Huang.
‘With the same GPU,’ Gupta said, ‘we can go into many different markets Cloud gaming will be a huge market – we are able to leverage all of these high volume markets and get into HPC at a price point other people cannot.’
Nvidia is launching two versions of the processor: one is available almost immediately that will have single precision and will be suitable for some scientific applications such as seismic profiling. The other, known as K20, will have double precision and enhanced queuing and parallelism but it will not be available until the last quarter of this year.
He pointed out that ‘with Kepler you can build a petaflop system, in just ten racks of servers. Two years ago, Tokyo Tech built a petaflop machine with Fermi [the predecessor to Kepler] and it took them 42 racks.’ To build a machine of similar performance based on Intel’s Sandybridge processor, would take about 100 racks of servers. ‘So Kepler is 10 times better than Sandybridge in terms of petaflops,’ he claimed. He also said that there would be a tenfold improvement in power consumption, with a 1 petaflop Kepler-based machine consuming just 400 kW as opposed to around 3MW with Sandybridge.
‘A petaflop machine of this size means that every university in the world can put one in,’ he said. He estimated that it would cost less than $4M for a petaflop machine, whereas in the recent past people have spent $30M to $40M to get the same performance. ‘There are universities out there that consume 400kW with a 10 rack system but they only get 20 teraflops, so they have this outlay but they are getting a twentieth of what they could be getting.’
But Gupta promised that Kepler was only one step along the road. Although, he said, ‘from my perspective, Kepler is a bigger shift than we have ever done before – much more revolutionary – there is so much innovation for us still to do. It’s a long road.’
A solution to the problem of antibiotic-resistant bacteria may be closer, as a result of a computer science project to investigate ways of making legacy software run efficiently on heterogeneous systems, the Nvidia 
