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NVIDIA GRID 2.0 comes to Microsoft Azure


“Our vision is to deliver accelerated graphics and high performance computing to any connected device, regardless of location,” said Jen-Hsun Huang, co-founder and CEO of NVIDIA. “We are excited to collaborate with Microsoft Azure to give engineers, designers, content creators, researchers and other professionals the ability to visualize complex, data-intensive designs accurately from anywhere.”

EU/European HPC Plans for the Next Decade


Bob Sorensen from IDC presented this talk at the HPC User Forum. In a recent study, IDC assessed the EU’s progress towards their 2012 action plan and made recommendations for funding exascale systems and fostering industrial HPC in the coming decade.

German Supercomputing Sites Become Centers of Excellence for Horizon 2020


Today the European Commission announced HLRS, JSC, and LRZ have been named “Centers of Excellence for computing applications. Funded by the EC and the Horizon 2020 program, the new Centers of Excellence will provide their petascale HPC infrastructure for developing services for European users in science and industry.

IBM Storage With OpenStack

IBM Cloud Service

While there is much discussion and products in the market regarding cloud computing and the ability to spin up a virtual machines quickly and efficiently, the fact remains that without planning for cloud based storage, the data will get lost. Simply put, without storage, there is no data.

PNNL Installs Data Vortex System


Today Data Vortex Technologies announced that the company has sold and delivered a DV205 system, “PEPSY”, to the Pacific Northwest National Laboratory (PNNL). PEPSY is specifically designed to solve problems requiring extensive processor-to-processor communication in parallel computing systems.

Video: On the Role of Flash in Large-Scale Storage Systems


Nathan Rutman from Seagate presented this talk at the LAD’15 Conference. “So why is a spinning disk company talking about Flash? Last year, Seagate acquired Avago LSI’s flash division. We now have an array of flash-based storage. So I have nothing against Flash. This presentation is really on: Where does Flash make sense? I also have a personal agenda because I hate the term “Burst Buffer.” Everyone says “Burst Buffer” instead of saying “Flash.” It drives me crazy. So I’m going to explain what a Burst Buffer is and what it is not.”

D-Wave to Collaborate with Google, NASA, and USRA on Quantum Computing


Today D-Wave Systems announced a new agreement covering the installation of a succession of D-Wave systems located at NASA’s Ames Research Center. “The new agreement is the largest order in D-Wave’s history, and indicative of the importance of quantum computing in its evolution toward solving problems that are difficult for even the largest supercomputers,” said D-Wave CEO Vern Brownell. “We highly value the commitment that our partners have made to D-Wave and our technology, and are excited about the potential use of our systems for machine learning and complex optimization problems.”

UCX: Co-Design Architecture For Next Generation HPC Systems


“The UCX Unified Communication X project is a collaboration between industry, laboratories, and academia to create an open-source production grade communication framework for data centric and high-performance applications. At the core of the UCX project are the combined features, ideas, and concepts of industry leading technologies including MXM, PAMI and UCCS. Mellanox Technologies has contributed their MXM technology, which provides enhancements to parallel communication.”

Video: HPC Technology Panel at the PBS Works User Group


Rich Brueckner from insideHPC moderated this panel discussion on current trends in HPC. “President Obama’s Executive Order establishing the National Strategic Computing Initiative (NSCI) will set the stage for a new chapter in leadership computing for the United States. In this panel discussion, thought leaders from leading supercomputing vendors share their perspectives on current HPC trends and the way forward.”

Jack Dongarra to Keynote Intel HPC Developer Conference at SC15

Jack Dongarra, University of Tennessee

Jack Dongarra from the University of Tennessee will keynote the first-ever Intel HPC Developer Conference, Nov. 14-15 in Austin, Texas. “The Intel HPC Developer Conference offers high levels of access. This is your best opportunity to connect with Intel architecture experts, meet HPC industry leaders, and build a lasting network of peers. This is your best opportunity to connect with Intel architecture experts, meet HPC industry leaders, and build a lasting network of peers. The conference will also offer insights into the future of HPC with Intel experts on visualization, machine learning, software tools and much more.”