The process to vectorize application code is very important and can result in major performance improvements when coupled with vector hardware. In many cases, incremental work can mean a large payoff in terms of performance. “When applications that have successfully been implemented on supercomputers or have made use of SIMD instructions such as SSE or AVX are excellent candidates for a methodology to take advantage of modern vector capabilities in servers today.”
Ansys, a provider of engineering simulation technology, has announced the release of its SeaScape architecture to help engineers accelerate the optimization of designs using a combination of elastic computation, machine learning, big data analytics and simulation technology.
Today AMD announced the Multiuser GPU (MxGPU) for blade servers, a new graphics virtualization solution that provides workstation-class experience. Now available HPE ProLiant WS460c Gen9 blade servers, the AMD FirePro S7100X GPU is the industry’s first and only hardware-virtualized GPU that is compliant with the SR-IOV (Single Root I/O Virtualization) PCIe virtualization standard. The AMD FirePro S7100X GPU is […]
Today Bright Computing announced that Sri Sathya Sai Institute of Higher Learning (SSSIHL) in India has chosen Bright infrastructure management technology to manage its HPC environment. This heterogeneous and hybrid cluster at SSSIHL is the first step towards achieving a self-sufficient HPC facility for the Institute’s research work, and we are pleased that Bright is […]
Disruptive Opportunities and a Path to Exascale: A Conversation with HPC Visionary Alan Gara of Intel
“We want to encourage and support that collaborative behavior in whatever way we can, because there are a multitude of problems in government agencies and commercial entities that seem to have high performance computing solutions. Think of bringing together the tremendous computational expertise you find from the DOE labs with the problems that someone like the National Institutes of Health is trying to solve. You couple those two together and you really can create something amazing that will affect all our lives. We want to broaden their exposure to the possibilities of HPC and help that along. It’s important, and it will allow all of us in HPC to more broadly impact the world with the large systems as well as the more moderate-scale systems.”
Today Symbolic IO emerged from stealth mode with a suite of products destined to change the way industry defines storage and computing architecture, by bringing to market the first truly computational-defined storage solution. “The company’s IRIS (the Intensified RAM Intelligent Server) product will be offered in three variations: IRIS Compute, IRISVault and IRIS Store. The server solution introduces a new approach to storage and computing by rethinking how binary bits are processed and ultimately changing the way data is utilized. Symbolic’s solutions ensure that enterprise storage and compute no longer rely on media or hardware, instead “materializing” and “dematerializing” data in real-time and providing greater flexibility, performance and security.”
“We took the Aries system interconnect from our supercomputers, the industry-standard architecture of our clusters, the scalable graph engine from the Urika-GD appliance, and the pre-integrated, open infrastructure of our Urika-XA system and combined them into one agile analytics platform. The Urika-GX gives our customers the tool they need to overcome their most advanced analytics challenges today, and the platform to bridge to tomorrow.”
Today AMD, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx announced a collaboration to bring the CCIX high-performance open acceleration framework to data centers. The companies are collaborating on the specification for the new Cache Coherent Interconnect for Accelerators (CCIX). For the first time in the industry, a single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators and enable efficient heterogeneous computing – significantly improving compute efficiency for servers running data center workloads.
Today the HPC Advisory Council announced its Fourth Annual RDMA Programming Competition in China. Designed to support undergraduate curriculum and talent development, this unique hands-on competition furthers students study, experience and mastery.
Today the ISC Group announced the appointment of Prof. Dr. Jack Dongarra of University of Tennessee, USA, as the program chairman for ISC 2017. This appointment underlines the international dimension of this conference. “I am honored to be named the program chair for ISC High Performance in 2017. I have been participating and actively contributing to ISC every year over the last three decades, first as a speaker, and later as a collaborator with Hans Meuer, Erich Strohmaier, and Horst Simon as one of the TOP500 authors,” said Dongarra. “My mission as program chair for ISC 2017 is to continue to improve the quality of the ISC technical program and to help expand the HPC community.”