Sign up for our newsletter and get the latest HPC news and analysis.

Video: Special Training Session for HPC Systems Managers and Users

oded

In this video from the 2015 HPC Advisory Council Switzerland Conference, Oded Paz presents: Special Training Session for HPC Systems Managers and Users: EDR InfiniBand, Multicast Operations (setup flow and diagnostic tools), Traffic Load Balancing, InfiniBand Quality Of Service, System Debugging, and open Q&A.

HPC and Software Modernization

Dr. Herbert Cornelius, Intel

“As we see Moore’s Law alive and well, more and more parallelism is introduced into all computing platforms and on all levels of integration and programming to achieve higher performance and energy efficiency. We will discuss Multi- and Many-Core solutions for highly parallel workloads with general purpose and energy efficient technologies. We will also touch on the challenges and opportunities for parallel programming models, methodologies and software tools to achieve highly efficient and highly productive parallel applications. At the end we will take a brief look towards Exascale computing.”

Video: High-Performance and Scalable Designs of Programming Models for Exascale Systems

DK Panda

“This talk will focus on programming models and their designs for upcoming exascale systems with millions of processors and accelerators. Current status and future trends of MPI and PGAS (UPC and OpenSHMEM) programming models will be presented. We will discuss challenges in designing runtime environments for these programming models by taking into account support for multi-core, high-performance networks, GPGPUs, Intel MIC, scalable collectives (multi-core-aware, topology-aware, and power-aware), non-blocking collectives using Offload framework, one-sided RMA operations, schemes and architectures for fault-tolerance/fault-resilience.”

Allinea Supports OpenPOWER Debugging

logo-allinea

Today Allinea Software announced that the C, C++ and F90 debugger Allinea DDT is now available for the OpenPOWER POWER8 architecture – marking a significant arrival in the ecosystem for developers on the platform.

Allinea Extends Performance Tools to CUDA

logo-allinea

Today Allinea announced CUDA 7 support for its DDT debugger. The news will be welcomed by HPC developers using the company’s Allinea Forge unified programming environment, which includes DDT and the Allinea MAP profiler.

Agenda Posted for Open Fabrics Workshop, March 15-18 in Monterey

Katie Antypas,
Services Department Head, National Energy Research Scientific Computing Center, Lawrence Berkeley National Laboratory

The OpenFabrics Alliance has published the agenda for their Developers’ Workshop in Monterey, CA. Beginning with a March March 15 keynote by Katie Antipas from NERSC, the agenda will center around three major themes: Applications Performance, Non-Volatile Memory, and Systems-on-a-Chip (SoCs).

Video: The Future of the Intel Mic Architecture

James Reinders

In this video, Intel’s James Reinders and Vadim Karpusenko from Colfax International discuss the future of parallel programming and Intel MIC architecture products.

ARM Joins OpenMP ARB

OpenMP

ARM has joined the OpenMP Architecture Review Board (ARB), a group of leading hardware and software vendors and research organizations creating the standard for the most popular shared-memory parallel programming model in use today.

The Past, Present, and Future of OpenACC

larkin

In this video from the University of Houston CACDS HPC Workshop, Jeff Larkin from Nvidia presents: The Past, Present, and Future of OpenACC. “OpenACC is an open specification for programming accelerators with compiler directives. It aims to provide a simple path for accelerating existing applications for a wide range of devices in a performance portable way. This talk with discuss the history and goals of OpenACC, how it is being used today, and what challenges it will address in the future.”

Performance Challenges Using OpenACC to Port O&G Apps

cray

“John Levesque is the Director of the Cray’s Supercomputer Center of Excellence based at Oakridge National Laboratory. He is responsible for the group performing application porting and optimization for break-through science projects. Levesque has been in High Performance computing for 40 years. Recently Levesque was promoted to Cray’s Chief Technology Office, heading the companies efforts in application performance.”