insideHPC » HPC

Whamcloud’s Gorda: Lustre has Great Momentum

Rich Brueckner — Thu, 09 Feb 2012 11:43:31 +0000

Whamcloud’s Brent Gorda writes that the Lustre parallel distributed file system has great momentum coming into 2012.

This year will see major new systems coming online at unprecedented scale and performance. Due to personal involvement over the years, I am especially excited to see Sequoia come online. It’s a 20 petaFLOPS (peak) system based on IBM BlueGene/Q technology at Lawrence Livermore National Laboratory (LLNL). At Oak Ridge National Laboratory (ORNL), they are upgrading Jaguar with GPGPUs to 9x its current performance to the same 20 petaFLOPS (peak). And Blue Waters at the University of Illinois, in the news due to the switch from IBM to Cray, will come online with a performance of over 11 petaFLOPS (peak).

Guess what core file system technology provides the foundation for these massive systems? In all three cases, it’s Lustre.

Read the Full Story. In related news, the Lustre community will gather in Austin for LUG 2012 on April 23-25.

Video: Open Science Rides LANL Mustang Super

Rich Brueckner — Thu, 09 Feb 2012 08:02:38 +0000

www.youtube.com/watch?v=VLuYuBqXdWY

In this video, Bob Tomlinson from LANL describes the recently acquired Mustang supercomputer from Appro.

The Mustang system has been supporting larger jobs as was intended and in just few months of use it has already offered 434 Million CPU hours for competitive, peer-reviewed, open science. According to the latest November 2011 Top500 list, Mustang was ranked as the 46th fastest supercomputer in the world supporting Climate, Environment, Electronic and many other science research projects.

How Xoreax Grid Engine Accelerates Applications Through Distributed Processing

Rich Brueckner — Wed, 08 Feb 2012 14:18:39 +0000

www.youtube.com/watch?v=JEtfB5J-mp8

In this video, Xoreax Co-Founder and Chairman Uri Mishol describes how the company’s XGE Grid Engine technology accelerates applications through distributed processing in Windows environments. Recorded at the Israel Supercomputer Conference on Feb. 7, 2012.

Trusted by over 2000 companies and organizations worldwide, XGE combines unique Virtualization technology with robust and flexible distributed computing algorithms to offer a powerful Grid Computing solution for the Windows platform that’s exceptionally simple to deploy and integrate.

Cray Forms YarcData Division for Big Data – Cray Spelled Backwards

Rich Brueckner — Wed, 08 Feb 2012 12:38:51 +0000

Today Cray announced it has created a new division focused on Big Data. This division, called YarcData, will be led by Arvind Parthasarathi, who has been appointed to the new position of senior vice president and general manager of YarcData.

Cray is best known for building supercomputers that can run massive scientific and engineering simulations, and from that work we have developed unique technologies and amassed significant experience working with some of the largest data-intensive environments in the world,” said Peter Ungaro, president and CEO of Cray. “This makes our entry into the Big Data market a natural evolution. I am extremely excited to have a proven executive like Arvind helping us bring our leading supercomputing technology to enterprise customers that are trying to gain insight and harness value from the explosion of data happening in their businesses today.”

According to the company YarcData will broadly expand the scope of what Cray’s Knowledge Management practice.

Read the Full Story.

Intel’s Future Haswell Processor to Feature Transactional Synchronization

Rich Brueckner — Wed, 08 Feb 2012 12:09:42 +0000

Intel’s James Reinders writes that the company will be introducing new Transactional Synchronization Extensions (TSX) for the future 22 nm multicore processor code-named “Haswell”. In a nutshell, Intel TSX provides a set of instruction set extensions that allow programmers to specify regions of code for transactional synchronization.

With transactional synchronization, the hardware can determine dynamically whether threads need to serialize through lock-protected critical sections, and perform serialization only when required. This lets the processor expose and exploit concurrency that would otherwise be hidden due to dynamically unnecessary synchronization.

Read the Full Story or download the updated specifications.

Job of the Week: Sys Admin at D. E. Shaw Research

Rich Brueckner — Wed, 08 Feb 2012 09:45:15 +0000

D. E. Shaw Research is seeking a Systems Administrator for Servers, Clusters, and Supercomputers in our HPC Job of the Week.

Exceptional sysadmins sought to manage systems and network infrastructure for a New York-based interdisciplinary research project. Successful hires will be responsible for our servers and cluster environments, including:

Massively parallel custom supercomputers

Hundreds of terabytes of storage

High-performance multi-gigabit networks

Linux clusters ranging from hundreds to thousands of CPU cores

Are you paying too much for your job ads? Not only do we offer ads for a fraction of what the other guys charge, our insideHPC Job Board is powered by SimplyHIred, the world’s largest job search engine.

As a reminder, we are offering FREE job listings for .EDU and .GOV domains, so email us at info @ insideHPC.com for a special discount code.

Video: ORNL – Advancing Research and Science through Supercomputing

Rich Brueckner — Tue, 07 Feb 2012 13:41:02 +0000

www.youtube.com/watch?v=wDpRDlwXwlQ

In this video, Richard Graham from Oak Ridge National Laboratory presents: Advancing Research and Science through Supercomputing. Recorded at the HPC Advisory Council Israel Supercomputing Conference on Feb 7, 2012 in Tel Aviv.

Presentations will soon be available from the conference site.

Slidecast: Solarflare ApplicationOnload Engine for On-the-Fly Processing of Network Data

Rich Brueckner — Tue, 07 Feb 2012 13:06:55 +0000

www.youtube.com/watch?v=j4srVTNLICo

In this slidecast, Mike Smith from Solarflare describes the company’s ApplicationOnload Engine (AOE), a new platform that moves application processing into the network adapter for applications that rely on real-time, high-performance network data.

Our new ApplicationOnload Engine is a new class of product that results directly from interaction with our end-user customers. Our engineers have worked closely with these customers to create a platform that leverages OpenOnload’s proven framework for creating a direct path from applications to the network, and incorporates on-the-fly processing of real-time network data,” said Russell Stern, CEO at Solarflare. “This solution provides not only the lowest latency and highest message rate network I/O performance, but achieves an unparalleled boost in application performance, all while maintaining a seamless, compatible interface with our existing server adapter products.”

Solarflare’s AOE combines a fully featured 10GbE server adapter with a state-of-the-art FPGA that provides a seamless, low-latency network interface to the host server and application processing. According to Smith, AOE is an open platform that utilizes applications developed by Solarflare, its customers, and third-party developers.

Read the Full Story * Download the MP3 * Subscribe on iTunes * If Dropbox is blocked, download from this Google page.

Interview: Satoshi Matsuoka Looks Forward to ISC’12

Rich Brueckner — Tue, 07 Feb 2012 10:23:50 +0000

ISC’12 will host the HPC in Asia Day on Sunday, June 17 in Hamburg. To learn more, I caught up with Satoshi Matsuoka from the Tokyo Institute of Technology to talk about the event and the challenges presented by extreme scale computing.

insideHPC: ISC will once again host a day devoted to HPC in Asia. How did that go last year and what can we expect to happen there this year?

Satoshi Matsuoka: It went quite well last year, with audiences not only from within Asia but also extensively from EU and the US. This was largely fueled by the Asian machines facilitating 4 of the top 5 machines on the Top 500, esp. getting the #1 (K) and #2 (Tianhe), as performing well also on the Green 500 (Tsubame2 being the #1 production machine).

insideHPC: I was part of the press corps that travelled with you to see the Chinese Tianhe-1A system in December. What did you take away from that visit?

Satoshi Matsuoka: That China of course is investing heavily into HPC, no doubt. By all means despite their impressive buildings and so forth their operational as well as application abilities are not quite there compared to the top centers in the US, EU, or Japan, but given that they were nowhere several years back their efforts should be applauded.

Given that, however, they are now considered to be in the “big leagues”, just as US/EU/Japanese top tier centers, so their various current shortcomings might haunt them. For example, we cannot get any detailed info regarding their operational information, that otherwise would be openly provided by other centers, e.g., the # of users, node occupancy rate, job rate, failure logs, etc. These will require honest, true-to-form committment to publish results even if they turn out to be disadvantageous to the Chinese centers. We did witness that such was not necessarily so in the recent high-speed train acceident; let us hope that the Chinese centers do not fall into the same trap.

insideHPC: You are on the Steering Committee for ISC and the SC conference series. What makes these conferences so valuable to you?

Satoshi Matsuoka:

These conference serve a common theme that it is a one-stop gathering for everything, including the latest research results, machines and other infrastructures, various software, applications, and of course the people. When I am at either of the conferences my schedule becomes extremely packed and tight for the whole week and even before, with abundance of meetings, talks, interviews, etc. It allows me to stay at the top tier of competitiveness by allowing me to both acquire and emit the latest info on quite an interactive basis with most of the people I would want to share the information with.

Now I am a fellow of ISC, as well as ACM Fellow and an advisor to ACM SIGHPC, in addition to being involved with the running of the SC conferences, including community chair for SC11 and program chair for SC13. Such positions and experiences are allowing me to see the organizational side of running such a mammoth gathering, especially from the perspective of giving the participants with the best experiences they could envision by being at ISC and SC. In this regard both conferences have their strength and weaknesses, and it would be a continued endeavor to contribute to improve them both on a candid, comparative basis.

insideHPC: The Tsubame 2.0 supercomputer is the only machine that is in the Top10 of both the TOP500 and Green500 lists. At extreme scale, does extreme power efficiency get even harder?

Satoshi Matsuoka: We are also in the Top 5 for the Graph500, as well as having received the Gordon Bell prize in 2011.

Gary Johnson, formerly of DoE has written a very nice article in this regard on HPCWire, and we here at Tokyo Tech including the University president is very happy about it.

Indeed, it has been pointed out by numerous studies that power & energy will become the limiting factor for exascale and we have every evidence to believe that. That is why as we operate TSUBAME we have several ongoing “Green” projects to investigate power efficiency for next generation TSUBAME3.0 as well as beyond.

insideHPC: What is your favorite thing about visiting Hamburg?

Satoshi Matsuoka: There is a folklore in Japan that Hamburg is the origin of Hamburgers. While I found this to be not true, Hamburg embodies multitudes of good German restaurants of all regions, and it is a joy to visit the good restaurants I have found over the years. Also Germany in general is very hospitable to Japanese, with longstanding mutual respect, and it is quite a comfortable place to mingle with the local people who seem to be really glad to see us there.

Video: Opening Session – Israel Supercomputing Conference 2012

Rich Brueckner — Tue, 07 Feb 2012 08:30:44 +0000

www.youtube.com/watch?v=cWAjehtv6D4

In this video, Gilad Shainer, Chairman of the HPC Advisory Council, and Yan Benhammou from Tel Aviv University open the Israel Supercomputing Conference 2012. Recorded Feb 7, 2012 in Tel Aviv.

Presentations will soon be available from the conference site.

Forbes Lists Rich Brueckner as one of Top 20 Big Data Influencers

Rich Brueckner — Mon, 06 Feb 2012 13:00:38 +0000

This week Forbes came out with its list of the Top 20 Big Data Influencers. We are pleased to announce that Rich Brueckner, President of insideHPC and chief contributor at inside-BigData came in at number 12 on the list.

Author Haydn Shaughnessy compiled the list from Traacker, an influence measurement tool that allowed him to rank Big Data pundits by Reach, Resonance and Relevance.

REACH – This is a measure of total audience size. Things like blog visitors, Twitter followers, YouTube subscribers, etc. go into scoring.

RESONANCE – This is a measure of how much activity someone creates when he/she publishes. How much interaction is there with this person’s content? Things like Twitter retweets, linkbacks, comments etc. are factors of someone’s Resonance.

RELEVANCE – This is a measure of how relevant someone is to a topic. Does he/she talk about this a lot? Relevance is a factor of how often someone uses the keywords that drove the search; the timing of the keyword usage (more recent posts are weighted more heavily); the diversity of the keywords used by an influencer; and the placement of keywords (title vs. body).

I have to say that it was quite a shock to find my name in Forbes. After all, our inside-BigData publication launched just five months ago, but I think this ranking reflects the growing reach of our inside* publications.

Is this my 15 minutes of fame? I guess we’ll find out. GigaOM has asked me to moderate a panel on Big Data and HPC at their upcoming Structure: Data Conference on March 22 in New York City. In the meantime, I’m working on getting named to my next list as one of the Top 20 IPA Taste Testers in Northwest Portland

Are You an HPC Industry Insider?

Ralph — Mon, 06 Feb 2012 11:39:55 +0000

Be sure to join your colleagues at the 26th annual High Performance Computing and Communications conference March 26-28, 2012 in Newport, Rhode Island.

New for 2012: The NHPCC Annual Conference Goes Global

The National High Performance Computing and Communications Conference (NHPCC) will highlight several exciting changes this year.

Also known as the ‘Newport Conference,’ the elite gathering that started 26 years ago as a one-day event to bring vendors together with government agency personnel has expanded its focus this year to include a more global perspective.

The new global focus features a roster of world-class speakers:

Aleksei Komkov, Chief Products and Technology Officer for T-Platforms, the leading developer of HPC systems in Russia, who will discuss “Supercomputing in Russia”
Andrew Jones, Vice-President High Performance Computing (HPC) Business for the NAG Group and a well-known HPC columnist and blogger, who will discuss “Supercomputing in the UK/Europe”
Sharan Kalwani, an HPC Platform Strategist at Intel Corporation and formerly with King Abdullah University of Science and Technology (KAUST) in Saudi Arabia, who will discuss “HPC in the Middle East.”

Another significant change this year is the emphasis on manufacturing and competitiveness.

Emphasis on Manufacturing

Bringing HPC to manufacturing is an important initiative, in the U.S. and the rest of the world. Competitiveness is an elusive goal that requires continual refinement and adoption of new technologies. HPCC 2012 will highlight this critical area with discussions on the application of HPC to modern manufacturing to address what many refer to as the ‘missing middle’ – referring to the thousands of small and mid-size businesses not currently taking advantage of high performance computing in areas such as design, manufacturing, logistics, transportation, etc.

Speakers in this area will include:

Emily DeRocco, President of The Manufacturing Institute who will discuss “HPC in Manufacturing and Competitiveness”
Dawn White of Accio Energy addressing, “Wind Energy from a Revolutionary Concept”
Suzy Tichenor from Oak Ridge National Laboratories who will discuss the ORNL Industrial Partnership Program

Another session of note will be moderated by Bob Feldman, President of HPC Marketing. Bob will host a Thought Leader panel discussion on “Supercomputing: Can America Compete Globally?” See the full program for a list of all invited speakers.

HPCC Registration is now open. Early bird registration fees are available up through February 24.

And be sure to see the insideHPC travel article on Newport posted earlier this month by Robert Murphy.

AMD Doubles Down on Existing Opteron Server Sockets

Ralph — Mon, 06 Feb 2012 10:30:50 +0000

By Timothy Prickett Morgan • Get more from this author

As El Reg anticipated earlier this week, the new upper management at AMD has come to its senses and figured out that moving to a new core and two new sockets for its Opteron line in 2012 was not a particularly good idea for its own finances, or those of the server makers who it wants to peddle Opteron-based iron. And so, that plan has been scrapped.

Instead, AMD is going to field new 32 nanometer processors based on the forthcoming “Piledriver” core design and jam them into the same G34 and C32 sockets, meaning that HP, Dell, Super Micro, IBM, Acer, and a handful of other box makers will not have to engineer new motherboards and systems.

AMD CEO Rory Read, formerly of IBM and Lenovo, spoke at the company’s analyst day in Silicon Gulch on Thursday and said that the company sees that “proprietary control points” were breaking down and that AMD was chasing “inflection points” in the PC, tablet, and server spaces. He explained AMD would bring its expertise in CPU and GPU design together to crafty system-on-chip (SoC) products that will, presumably, also integrate network and other types of I/O directly on the chip.

“Shift happens, shift is good,” Read stated emphatically, and with a straight face, adding that AMD was being tweaked to become a “market driven company” and not second fiddle in an “unhealthy duopoly.” The task Read sees ahead for AMD is “about stepping out of the shadows and leading.”

But, according to Read and Lisa Su (a semiconductor researcher at IBM and former CTO at Freescale Semiconductor who was hired back in December to be senior vice president and general manager of the new Global Business Units,) what AMD needs to do right now in servers is to step back, ramp up production of Opteron 4200 and 6200 processors and rebuild and extend relationships with server makers as it plots out its future Opteron chips.

Sticking with the existing C32 sockets for the Opteron 4200 sockets and the G34 sockets for the Opteron 6200s is just part of listening to the customer. It also gives AMD some engineering breathing time to come up with interesting, low-power Opteron platforms that are tailored specifically for hyperscale Web, big data, server virtualization, database, and similar workloads where AMD’s Opterons do well.

“Server is a great opportunity for us, and it is clear that our market share is not very high today,” conceded Su. But she also said that the “Bulldozer” core and its different architecture takes time to get its footing. Considering this, introducing new sockets right now was a bad idea technically and economically for both AMD and server makers. “At the end of the day, that wasn’t the right answer for our customers,” Su said.

Back in November 2010, two months before CEO Dirk Meyer was ousted, the plan was to crank up the Opteron 6200s to 20 cores using the new Piledriver core, an improved version of the current “Bulldozer” core used in the Opteron 4200 and 6200 server processors as well as a number of desktop chips.

The plan called for the “Sepang” processor to have up to ten Piledriver cores and plug into the C32 sockets, which are used to make servers with one or two sockets across a single memory space. The “Terramar” Opteron chip was the kicker to the current Opteron 6200 and would put two of these Sepang chips in a single package and scale it up to 20 cores per socket. Both of these chips were implemented in the 32 nanometer silicon-on-insulator (SOI) processes from fab partner GlobalFoundries.

A year later, with microservers taking off (at least in terms of marketing hype), AMDannounced that it would chase microserver builders with a new single-socket Opteron 3000 chip, code-named “Zurich,” that plugged into the AM3+ socket. The Zurich chip is a variant of the Opteron 4200 with four or eight cores activated, one HyperTransport link, and – most importantly – availability in less expensive motherboards.

The Zurich chip, presumably to be called the Opteron 3200, was expected sometime in the first half of 2012 when AMD was talking about it last fall, but it is now going to be launched in the first quarter, as you can see in the roadmap below:

AMD’s revised Opteron server roadmap (click to enlarge)

For larger Opteron systems, AMD is taking a conservative approach. Rather than adding two more cores to the basic Opteron processor unit, the new “Seoul” processor keeps the core count at six or eight as the new Piledriver core is brought in. The DDR3 main memory stays the same – two channels per socket – as with the current Opteron 4200s, and the chips will not include any additional on-chip I/O, such as the PCI-Express 3.0 links that Intel is putting on its forthcoming “Sandy Bridge” family of Xeon E5 processors for machines with one, two, or four sockets.

The high-end “Abu Dhabi” Opterons will have 4, 8, 12, and 16 Piledriver cores, the same core count as the Opteron 6200s that started shipping last summer, and will sport the same four channels of DDR3 memory per socket.

You’ll notice that AMD is not talking about how many HyperTransport links will be on these future Piledriver-based Opterons or what speed they will run at, so it makes perfect sense to conjecture that they will run at a faster rate – 8GT/sec sounds reasonable to match the expected 25 per cent increase in raw performance that AMD was promising for Piledriver cores in desktop processors.

AMD is also expecting to put out a kicker for the Opteron 3200, dubbed “Delhi” and offering four or eight Piledriver cores.

All of the new Opterons will be etched in GlobalFoundries’ 32 nanometer processes, just like the current ones are. On the desktop processor roadmaps that Su went over, the chips for 2012 and those for 2013 were clearly marked. Not so on the server chip roadmaps, but we placed a call to AMD and were told by a spokesman that all of the chips above will be coming out this year. The Abu Dhabi and Seoul Opterons are due towards the end of the year.

The big change, according to new AMD CTO Mark Papermaster, formerly of IBM, Apple, and Cisco Systems, was that AMD was shifting from a design philosophy that focused in the performance of processor cores, adopted the bleeding edge tech from GlobalFoundries or Taiwan Semiconductor Manufacturing Corp to try to compensate for the process lag AMD (and everyone else) has with Intel.

This lead to execution problems, and more importantly, Papermaster said that the company’s current managers do not believe that the process technology node trumps integration of functions on an SoC and the “experience” that the user has using a device based on AMD silicon.

Su didn’t give out a lot of details on the future Piledriver cores, except to say that it would be able to do more instructions per cycle and would have higher clock frequencies. Many had expected for Bulldozer to do better on the clock speed front.

AMD’s Opteron core roadmap (click to enlarge)

Looking out further into the future, AMD is cooking up a third generation modular core called “Steamroller,” which would have a greater level of parallelism. This could mean a lot of different things, such as adding more threads or cores to the chip or adding more instruction units per core module. Su did not say, and it is likely that AMD is itself not quite sure what it means. And further out beyond that, AMD will crank out more performance in some unspecified way with a modular core design called “Excavator.”

It will be interesting to see what AMD integrates onto its server chips and how fast it can do it. In the meantime, Intel is going to make plenty of hay in the supercomputing market where there are workloads with heavy I/O demands because it can support PCI-Express 3.0 peripherals with the future Xeon E5 processors. It remains to be seen how much of an advantage this will be across the server market at large. ®

This article originally appeared in The Register. It appears here in its entirety as part of a cross-publishing agreement.

Call for Posters: HPC in Asia Workshop at ISC’12

Rich Brueckner — Sun, 05 Feb 2012 14:33:46 +0000

The International Supercomputing Conference has issued its Call for Posters at the HPC in Asia Workshop. The workshop will take place on Sunday, June 17 just prior to the opening of the ISC12 conference in Hamburg, Germany.

The 2012 workshop aims to share information on the latest status of HPC systems and applications from leading countries in Asia, as well as presenting related HPC activities and research in Asia. The scope of poster presentations include the following areas but is not limited to them:

Applications: any fields of science and engineering computing led by Asian HPC research groups with Asian HPC resources
Systems: research on system hardware/architecture/software led by Asian research groups
Performance: system performance analysis related to Asian HPC systems

The deadline for extended abstract submissions is Sunday, April 1, 2012. Please submit your poster to submit.hpcasia@isc-events.com.

Read the Full Story.

Video: Living with Thinking Machines

Rich Brueckner — Sun, 05 Feb 2012 13:22:29 +0000

Our Video Sunday feature continues with this 90 minute program from the World Science Festival. IBM’s WATSON and a group of leading roboticists and computer scientists discuss the thinking machines of today and the possibilities to come in the not-too-distant future.

In recent years, machines have grown increasingly capable of listening, communicating, and learning—transforming the way they collaborate with us, and significantly impacting our economy, health, and daily routines. Who, or what, are these thinking machines? As we teach them to become more sophisticated, how will they complement our lives? What will separate their ways of thinking from ours? And what happens when these machines understand data, concepts, and behaviors too big or impenetrable for humans to grasp?

Interview: Thomas Sterling – In Search of the Exascale Roadmap

Rich Brueckner — Sat, 04 Feb 2012 00:06:01 +0000

Clipped from: www.theexascalereport.com (share this clip)

As a subscription-only publication, The Exascale Report doesn’t often release their content to the general public. In a rare move this week, the editors have published a recent interview with Thomas Sterling “that’s too important not to share.”

The past year, 2011, has been a critical year for Exascale computing in that it has been both a disappointment in this regard and at the same time has created an emergent context in which responsible revolution for essential innovation may occur. In a sense the Exascale community, if that can be considered a meaningful term, has grown up. The disappointment has come from DARPA; the agency historically noted for leading HPC system research and development. This strategic commitment had wavered but was seen in resurgence with important funded studies and the initiation of the UHPC and OHPC programs. While UHPC was not formally an Exascale program, it would have developed the necessary hardware and software technologies necessary and capable of supporting large, but not prohibitively large, Exascale computational systems. OHPC was an explicitly Exascale technologies-related program that would have augmented the principal UHPC projects (there are 4). OHPC was cancelled shortly after the awards were made and there appears little likelihood that UHPC will extend beyond its first phase although it was originally planned for four such phases to produce final proof-of-concept experimental platforms. In truth, much has been learned even from this single 2-year phase but it is disappointing that the leadership momentum capturing talents of industry, national laboratories, and academia is being dissipated and will be lost.

Sterling goes on to say that 2012 represents a fork for Exascale. He contends that if the the US and the world derive the courage to take a path of innovation, we can get where we want to go.

From this reporter’s perspective, I’m hoping our directions don’t rely on solely Google Maps. Read the Full Story or Download the MP3.

Altair Aims to Ease Simulation With PBS Pro 11.2

Ralph — Fri, 03 Feb 2012 18:45:23 +0000

This week Altair announced released a new Compute Manager and PBS Desktop applications. Designed to streamline engineering workflow within an enterprise, the new software allows engineers submit jobs through a Web-based interface, manage workloads, and immediately review and download the results.

The release of Compute Manager and PBS Desktop marks the beginning of the next level of efficiency and ease for engineers engaged in high-performance computing for everything from crash analysis to animation and weather prediction,” said Mahalingam. “Simulations originate on many types of devices these days, and Altair’s high-performance computing tools focus on helping engineers use the resources at their fingertips in a very user-centric way. We are making the process of managing simulation projects more intuitive, more natural, and more efficient.”

With this new release, can use the enhanced graphical interface in PBS Pro 11.2 scales submit jobs on large clusters and obtain maximum value from their computing infrastructure. Read the Full Story.

Slidecast: GPU Computing and the Road to Extreme-Scale Parallel Systems

Rich Brueckner — Fri, 03 Feb 2012 13:00:40 +0000

www.youtube.com/watch?v=4IH5X12knqU

In this slidecast, Nvidia’s Steve Keckler describes the evolutionary path of GPU computing and where it’s heading on the road to Exascale computing. Keckler is part of the team working on the company’s Echelon research project, which is looking into technologies that will eventually enable an Exaflop supercomputer to operate at under 20 Megawatts.

Nvidia’s Echelon extreme-scale computing project is partly funded by DARPA under the Ubiquitous High Performance Computing (UHPC) program. The other UHPC program teams include the X-Caliber team led by Sandia National Laboratories, the Intel UHPC Runnemede team, and the Angstrom team led by MIT.

The Ubiquitous High Performance Computing (UHPC) program seeks to develop the architectures and technologies that will provide the underpinnings, framework and approaches for the resolution of power consumption, cyber resiliency, and productivity problems. The UHPC program aims to develop computer systems, from embedded to cabinet level, which have extremely high energy efficiency and are dependable and easily programmable. These systems will have dramatically reduced power consumption while delivering a thousand-fold increase in processing capabilities. Dependability technologies developed under the UHPC program will provide adaptable and hardened cyber resilient computer systems. Productivity will be significantly improved by developing scalable, highly programmable computer systems that will not require significant system expertise for the development of high performance applications.

Download the MP3 * Subscribe on iTunes * If Dropbox is blocked, download from this Google page.

Cray XE6m Midrange System Weighs in at $31K per Teraflop

Rich Brueckner — Thu, 02 Feb 2012 19:33:03 +0000

While affordable Petascale computing may be a ways off, this week Cray rolled out the Cray XE6m system, a midrange supercomputer that brings the hyperscale technologies being deployed at BlueWaters and Titan down to the rack level. With six blades and 48 sockets using the new Opteron 6200s, the Cray XE6m starts at $200K, or approximately $30,769 per teraflops.

Building on the reliability and scalability of the Cray XE6 supercomputer and using the same proven petascale technologies, the Cray XE6m system is optimized to support scalable application workloads in the midrange high performance computing (HPC) market, where applications require between 700 and 13,000 cores of processing power.

Read the Full Story.

Seymour Cray – The First Iconic Figure in the Industry

Rich Brueckner — Thu, 02 Feb 2012 16:18:15 +0000

Patrick Seitz over at Investor’s Business Daily has posted an interesting profile of Seymour Cray, calling him the “first iconic figure in the industry.”

Cray was a risk taker. Whereas corporations tended toward evolutionary technology, he was looking for breakthrough advances in computing. That conflict led Cray on four occasions to start new companies to pursue his dreams of faster, more capable computers. “He did his own thing in his own way,” Steve Wallach, recipient of the 2008 IEEE Computer Society Seymour Cray Computer Engineering Award, told IBD. “What Steve Jobs was to personal computers, Seymour Cray was to supercomputers.”

Read the Full Story or check out this mini-documentary on Seymour Cray I helped produce back in 1996.