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Agenda Posted for June Teratec Forum in France

The TERATEC Forum has posted their Agenda for their upcoming June meeting. With technical workshops, plenary sessions and a vendor exhibit, the event takes place June 27-28 at the Ecole Polytechnique campus in Palaiseau, France. “Our objective is to bring together all decision makers and experts in the field of digital simulation and Big Data, from the industrial and technological world and the world of research.”

A PCIe Congestion-Aware Performance Model for Densely Populated Accelerator Servers

“MeteoSwiss, the Swiss national weather forecast institute, has selected densely populated accelerator servers as their primary system to compute weather forecast simulation. Servers with multiple accelerator devices that are primarily connected by a PCI-Express (PCIe) network achieve a significantly higher energy efficiency. Memory transfers between accelerators in such a system are subjected to PCIe arbitration policies. In this paper, we study the impact of PCIe topology and develop a congestion-aware performance model for PCIe communication. We present an algorithm for computing congestion factors of every communication in a congestion graph that characterizes the dynamic usage of network resources by an application.”

Intel Xeon Phi Processor Intel AVX-512 Programming in a Nutshell

In this special guest feature, James Reinders discusses the use of the Intel® Advanced Vector Instructions (Intel® AVX-512), covering a variety of vectorization techniques available for accessing the performance of Intel AVX-512.

Registration Opens for PASC17 Conference in Lugano

Registration is now open for the PASC17 conference, which takes place the week after ISC in Lugano, Switzerland. “The PASC17 Conference is pleased to announce that a preliminary program is available online and that registration is now open. The PASC Conference is an interdisciplinary ev”ent in high performance computing that brings together domain science, applied mathematics and computer science – where computer science is focused on enabling the realization of scientific computation.

Agenda Posted for LUG 2017 in Bloomington

The OpenSFS Lustre community has posted the Agenda for their upcoming LUG 2017 conference. The event takes place May 30 – June 2 in Bloomington, Indiana. The Lustre User Group (LUG) conference is the industry’s primary venue for discussion and seminars on the Lustre parallel file system and other open source file system technologies.” LUG provides […]

Panel Discussion: The Exascale Era

In this video from Switzerland HPC Conference, Rich Brueckner from insideHPC moderates a panel discussion on Exascale Computing. “The Exascale Computing Project in the USA is tasked with developing a set of advanced supercomputers with 50x better performance than today’s fastest machines on real applications. This panel discussion will look at the challenges, gaps, and probable pathways forward in this monumental endeavor.”


Gilad Shainer, HPC Advisory Council
Jeffrey Stuecheli, IBM
DK Panda, Ohio State University
Torsten Hoefler, ETH Zurich
Rich Graham, Mellanox

A Fresh Look at HPC from Huawei Enterprise

“High performance computing is rapidly finding new uses in many applications and businesses, enabling the creation of disruptive products and services. Huawei, a global leader in information and communication technologies, brings a broad spectrum of innovative solutions to HPC. This talk examines Huawei’s world class HPC solutions and explores creative new ways to solve HPC problems.”

dCUDA: Distributed GPU Computing with Hardware Overlap

“Over the last decade, CUDA and the underlying GPU hardware architecture have continuously gained popularity in various high-performance computing application domains such as climate modeling, computational chemistry, or machine learning. Despite this popularity, we lack a single coherent programming model for GPU clusters. We therefore introduce the dCUDA programming model, which implements device-side remote memory access.”

Job of the Week: Software Developer for Exascale at General Atomics

General Atomics in San Diego is seeking a Software Developer for Exascale Computing at General Atomics in our Job of the Week. “This position independently leads the design, development and verification of novel scientific software for high-fidelity physics simulations on unique high performance computational hardware including Exascale-class systems.”

Call for Proposals: LAD’17 in Paris

The LAD’17 Lustre Administrators and Developers Conference has issued their Call for Proposals. The event takes place Oct. 3-4 in Paris. “We are inviting community members to send proposals for presentations at this event. No proceeding is required, just an abstract of a 30-min (technical) presentation. Topics may include (but are not limited to): site updates or future projects, Lustre administration, monitoring and tools, Lustre feature overview, Lustre client performance, benefits of hardware evolution to Lustre, comparison between Lustre and other parallel file system, Lustre and Exascale I/O, etc.”