“This talk will focus on programming models and their designs for upcoming exascale systems with millions of processors and accelerators. Current status and future trends of MPI and PGAS (UPC and OpenSHMEM) programming models will be presented. We will discuss challenges in designing runtime environments for these programming models by taking into account support for multi-core, high-performance networks, GPGPUs, Intel MIC, scalable collectives (multi-core-aware, topology-aware, and power-aware), non-blocking collectives using Offload framework, one-sided RMA operations, schemes and architectures for fault-tolerance/fault-resilience.”
Today Oak Ridge announced approval of a project run ParallelWare from Appentra on the Titan Supercomputer. The project includes an allocation of 50,000 core hours on supercomputer. “ParallelWare is an source-to-source parallelizing compiler for sequential scientific programs. ParallelWare automatically discovers the parallelism available int he input sequential C code, and automatically generates parallel-equivalent C code annotated with OpenMP compiler directives.
The first annual Intel HPC Developer Conference is coming to Austin Nov. 14-15 in conjunction with SC15. “The Intel® HPC Developer Conference will bring together developers from around the world to discuss code modernization in high performance computing. Learn what’s next in HPC, its technologies, and its impact on tomorrow’s innovations. Find the solutions to your biggest challenges at the Intel® HPC Developer Conference.”
HPC developers want to write code and create new applications. The advanced nature of HPC often requires that this process be associated with specific hardware and software environment present on a given HPC resource. Developers want to extract the maximum performance from HPC hardware and at the same time not get mired down in the complexities of software tool chains and dependencies.
In this video, LLNL scientists discuss the challenges of debugging programs at scale on the Sequoia supercomputer, which has 1.6 million processors. “Bugs in parallel HPC applications are difficult to debug because errors propagate among compute nodes, programmers must debug thousands of nodes or more, and bugs might manifest only at large scale.”
A convergence in the fields of High Performance Computing (HPC) and Big Data has led to new opportunities for software developers to create and deliver products that can help to analyze very large amounts of data. The HPC software ecosystem over the years have created and maintained sets of numerical libraries, communication API’s (MPI) and applications to make running HPC type applications faster and simpler to design. Low level libraries have been developed so that developers can concentrate on higher level algorithms. Products such as the Intel Math Kernel Library (Intel MKL) have been highly tuned to take advantage of multiple cores and newer instructions sets.