Xilinx has announced that Baidu, a Chinese language Internet search provider, is utilizing Xilinx FPGAs to accelerate machine learning applications in its datacenters in China. “Acceleration is essential to keep up with the rapidly increasing data centre workloads that support our growth,” said Yang Liu, executive director at Baidu.
Today the OpenPOWER Foundation announced that their inaugural OpenPOWER Summit Europe will take place Oct. 26-28 in Barcelona, Spain. Held in conjunction with OpenStack Europe, the OpenPOWER Summit Europe, the event will feature speakers and demonstrations from the OpenPOWER ecosystem, including industry leaders and academia sharing their technical solutions and state of the art advancements.
Pat McGarry from Ryft presented this talk at the HPC User Forum in Tucson. “Years in the making, the Ryft ONE combines two proven innovations in hardware and software to optimize compute, storage and I/O performance: the Ryft Hybrid FPGA/x86 Compute Platform, which leverages a massively parallel bitwise computing architecture and the Ryft Algorithmic Primitives (RAP) Library.
“The Exascale computing challenge is the current Holy Grail for high performance computing. It envisages building HPC systems capable of 10^18 floating point operations under a power input in the range of 20-40 MW. To achieve this feat, several barriers need to be overcome. These barriers or “walls” are not completely independent of each other, but present a lens through which HPC system design can be viewed as a whole, and its composing sub-systems optimized to overcome the persistent bottlenecks.”
Today the Pittsburgh Supercomputing Center (PSC) announced a $1.8-million National Institutes of Health grant to make the next-generation Anton 2 supercomputer developed by D. E. Shaw Research (DESRES) available to the biomedical research community. A specialized system for modeling the function and dynamics of biomolecules, the Anton 2 machine at PSC will be the only one of its kind publicly available to U.S. scientists. The grant also extends the operation of the Anton 1 supercomputer currently at PSC until the new Anton 2 is deployed, expected in the Fall of 2016.
This week at SC15, One Stop Systems featured the first PCIe 3.0 expansion appliance to support up to sixteen Nallatech 510T accelerator cards. The preconfigured appliance is targeted for data centers operating HPC applications, providing the user with a complete appliance that solves many integration issues, provides enhanced performance, and allows for scalable flexibility. The user simply attaches the HDCA to up to four servers and has thousands of additional compute cores readily available. Each connection operates at PCIe x16 3.0 with speeds of up to 128Gb/s.
In this podcast, the Radio Free HPC team shares their thoughts from SC15 in Austin. Henry is impressed by the increasing presence of FPGAs on the show floor. Dan is really impressed with Allinea Performance Reports profiling tool and how easy it is to use. And Rich sees SC15 as the crossroads that we’ll remember where Intel squared off with the official launch of their Omni-Path Interconnect and Scalable System Framework against the co-design alliance of OpenPOWER with IBM, Mellanox, and Nvidia.
Today IBM and Xilinx announced a multi-year strategic collaboration to enable higher performance and energy-efficient data center applications through Xilinx FPGA-enabled workload acceleration on IBM POWER-based systems. IBM and Xilinx, through a private signed agreement and collaboration through the OpenPOWER Foundation, are teaming to develop open acceleration infrastructures, software and middleware to address emerging applications such as machine learning, network functions virtualization (NFV), genomics, high performance computing (HPC) and big data analytics.
Today TACC announced it will enable users to take advantage of the capabilities of Microsoft’s Project Catapult reconfigurable fabric platform. Project Catapult is expected to improve the speed and efficiency of science and engineering calculations using conventional cluster nodes augmented with field-programmable gate arrays, or FPGAs.
Today Nallatech announced the 510T FPGA co-processor. Designed to deliver ultimate performance per watt for compute-intensive datacenter applications, the 510T is a GPU-sized 16-lane PCIe 3.0 card featuring two of Altera’s new floating-point enabled Arria 10 FPGAs delivering up to sixteen times the performance of the previous generation. According to Nallatech, applications can achieve a total sustained performance of up to 3 TFlops.