The Gen-Z Consortium has announced it will participate in the upcoming Flash Memory Summit and SC20 conferences. Along with speaking engagements and panel participation, the interconnect consortium will showcase Gen-Z technology demos from member companies in GenZ’s virtual booths. Flash Memory Summit, Nov. 10-12, will include online presentations along with a virtual exhibit hall featuring […]
MUG ’20, Altair, Arm DevSummit Announce Conference Agendas
August 12, 2020 by
Several organizations have released updates on upcoming conferences and user group meetings. Here’s a summary with links to further information. The MVAPICH User Group Meeting (MUG ’20), built around an implementation of the MPI standard developed by Ohio State University, will be an online event held on Monday, August 24th through Wednesday, August 26th. This […]
CXL and Gen-Z Consortiums to Collaborate
April 3, 2020 by
Today the Compute Express Link (CXL) Consortium and Gen-Z Consortium announced a Memorandum of Understanding (MOU) describing a mutual plan for collaboration between the two organizations. The agreement shows the commitment each organization is making to promote interoperability between the technologies, while leveraging and further developing complementary capabilities of each technology. “CXL technology and Gen-Z are gearing up to make big strides across the device connectivity ecosystem. Each technology brings different yet complementary interconnect capabilities required for high-speed communications,” said Jim Pappas, board chair, CXL Consortium. “We are looking forward to collaborating with the Gen-Z Consortium to enable great innovations for the Cloud and IT world.”
Video: Gen-Z High-Performance Interconnect for the Data-Centric Future
March 25, 2018 by
Greg Casey from Dell gave this talk at the 2018 OCP Summit. “Gen-Z is different. It is a high-bandwidth, low-latency fabric with separate media and memory controllers that can be realized inside or beyond traditional chassis limits. It treats all components as memory (so-called memory-semantic communications), and it moves data between them with minimal overhead and latency. It thus takes full advantage of emerging persistent memory (memory accessed over the data bus at memory speeds). It can also handle other compute elements, such as GPUs, FPGAs, and ASIC or coprocessor-based accelerators.”
Gen-Z Consortium Announces the Public Release of Its Core Specification 1.0
February 13, 2018 by
Today the Gen-Z Consortium released the Gen-Z Core Specification 1.0 on its website. As an open systems interconnect, Gen-Z is designed to provide memory semantic access to data and devices via direct-attached, switched or fabric topologies. “The release of core specification 1.0 today is a significant step towards realization of new architectures and evolution of existing technologies to expand into new roles. Samsung is excited to be a member of the Gen-Z Consortium and is committed towards industry open standards.”
CCIX Project to link ARM Processors and FPGAs for HPC
September 12, 2017 by
Today ARM, Xilinx, Cadence, and Taiwan Semiconductor announced plans to produce the first test chip for the Cache Coherent Interconnect for Accelerators (CCIX) project. CCIX (pronounced “C6”) aims to prove that many-core ARM processors linked to FPGAs have a home in HPC. “The test chip will not only demonstrate how the latest Arm technology with coherent multichip accelerators can scale across the data center, but reinforces our commitment to solving the challenge of accessing data quickly and easily.”
Gen-Z Multi-Vendor Technology Demo Speeds Memory-Centric Computing
August 9, 2017 by
Today the Gen-Z Consortium announced the world’s first Gen-Z multi-vendor technology demonstration, connecting compute, memory, and I/O devices at Flash Memory Summit in Santa Clara. “The demonstration utilizes FPGA-based Gen-Z adapters connecting compute nodes to memory pools through a Gen-Z switch, creating a fabric connecting multiple server vendors and a variety of memory vendors. The multi-vendor participation reflects strong industry support for Gen-Z and showcases how future data centers can leverage this technology to attain a unified, high-performance and scalable fabric/interconnect. Additionally, a separate demonstration will show the scalable prototype connector defined by the Gen-Z Consortium, running at 112 giga-transfers/sec.”
GEN-Z: An Overview and Use Cases
April 5, 2017 by
Greg Casey from Dell EMC presented this talk at the OpenFabrics Workshop. “This session will focus on the new Gen-Z memory-semantic fabric. The speaker will show the audience why Gen-Z is needed, how Gen-Z operates, what is expected in first products that employ Gen-Z, and encourage participation in finalizing the Gen-Z specifications. Gen-Z will be connecting components inside of servers as well as connecting servers with pools of memory, storage, and acceleration devices through a switch environment.”
