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New Paper: Can 3D-Stacking Topple the Memory Wall?

Memory latency depends on the used memory bandwidth, and the memory latency-bandwidth curve has three regions — constant, linear and exponential. Moving from conventional DDRx (upper figure) to high-bandwidth memory solutions (lower figure) will significantly reduce memory latency only for workloads located in theexponential region of the DDRx latency-bandwidth curve.

Can 3D-stacking technology topple the long-standing “memory wall” that’s been holding back HPC application performance? A new paper from the Barcelona Supercomputing Center written in collaboration with experts from Chalmers University and Lawrence Livermore National Laboratory concludes that it will take more than just the simple replacement of conventional DIMMs with 3D-stacked devices.

Interview: Experimenting with DEEP-ER NAM Technology


“As the name indicates: A NAM is basically a storage device plugged into the interconnect network of a Cluster. That sounds pretty simple and straightforward. But the underlying technology is quite new and exciting and the NAM concept enables entirely new approaches for using memory as a shared resource.”

Micron Rolls Out Hybrid Memory Cube


In this video from SC13, Micron rolls out their Hybrid Memory Cube technology.