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Supercomputing Moves Closer to Predicting Earthquakes

Pioneering simulation of the 1992 7.3M Landers earthquake

“Working in close collaboration with Intel Labs Parallel Computing Lab, performing a series of architecture-aware optimizations, the team was able to scale the complexity of science and sustained performance to an unprecedented level. SeisSol sustained 8.6 PFLOPS (double precision), almost equivalent 8.6 quadrillion calculations per second when processing seismic wave phenomena using half of the Tianhe-2 supercomputer.

New Whitepaper: File I/O on Intel Xeon Phi (RAM disks, VirtIO, NFS, and Lustre)

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“This paper provides information and benchmarks necessary to make the choice of the best file system for a given application from a number of the available options: RAM disks, virtualized local hard drives, and distributed storage shared with NFS or Lustre. We report benchmarks of I/O performance and parallel scalability on Intel Xeon Phi coprocessors, strengths and limitations of each option.”

Porting to Accelerators with Hybrid Fortran

Hybrid Fortran unified code: Separate loop structures for CPU and GPU, automatic code conversion to higher dimensions when needed.

Over at Typhoon Computing, Michel Müller writes programmers looking to port their code to accelerators now have a new tool called Hybrid Fortran. “This python-based preprocessor parses annotations together with your Fortran code structure, declarations, accessors and procedure calls, and then writes separate versions of your code – once for CPU with OpenMP parallelization and once for GPU with CUDA Fortran.”

New Approaches to Energy Efficient Exascale

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“As displayed at ISC’14, DEEP combines a standard InfiniBand cluster of Intel Xeon nodes, with a new, highly scalable ‘booster’ consisting of Phi co-processors and a high-performance 3D torus network from Extoll, the German interconnect company spun out of the University of Heidelberg.”

Intel Adds Vector Instructions for Knights Landing

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James Reinders writes that additional vector instructions have now been documented for Intel AVX-512, which will be first implemented in the future Intel Xeon Phi processor and coprocessor known by the code name Knights Landing.

Farber to Teach All-Day Tutorial At SC14

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Over at TechEnablement, Rob Farber writes that he will be teaching an all-day tutorial “From ‘Hello World’ to Exascale Using x86, GPUs and Intel Xeon Phi Coprocessors” (tut106s1) at SC14 in New Orleans. The tutorial takes place on Sunday November 16, 2014.

Job of the Week: Xeon Phi Platform Marketing Engineer at Intel

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Intel is seeking an Xeon Phi Platform Marketing Engineer in our Job of the Week.

Computational Biology using Intel Xeon and Intel Xeon Phi

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In this video from ISC’14, Christian Blau from the Max Planck Institute and Greg Johnson from Intel describe their demonstration of Computational Biology using Intel Xeon and Intel Xeon Phi.

Video: PRACE Award Winners – Sustained Petascale Seismic Simulations

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In this video from ISC’14, Alex Heinecke from Intel and Sebastian Rettenberger from the Technical University of Munich describe their award-winning paper on volcano simulation. “Seismic simulations in realistic 3D Earth models require peta- or even exascale compute power to capture small-scale features of high relevance for scientific and industrial applications. In this paper, we present optimizations of SeisSol — a seismic wave propagation solver based on the Arbitrary high-order accurate DERivative (ADER) Discontinuous Galerkin method on fully adaptive, unstructured tetrahedral meshes — to run simulations under production conditions at petascale performance.”

RSC Announces Record Compute Density with Xeon Phi at ISC’14

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Russian supercomputing vendor RSC Group announced world record compute and power density with their RSC PetaStream and RSC Tornado based clusters.