In this Intel Chip Chat podcast, Alyson Klein and Charlie Wuischpard describe Intel’s investment to break down walls to HPC adoption and move innovation forward by thinking at a system level. “Charlie discusses the announcement of the Intel Xeon Phi processor, which is a foundational element of Intel Scalable System Framework (Intel SSF), as well as Intel Omni-Path Fabric. Charlie also explains that these enhancements will make supercomputing faster, more reliable, and increase efficient power consumption; Intel has achieved this by combining the capabilities of various technologies and optimizing ways for them to work together.”
In this Intel Chip Chat podcast with Allyson Klein, Cray CTO Steve Scott describes the collaboration between Cray and Intel on the Intel Xeon Phi Processor for supercomputer integration. Steve highlights that Cray chose to implement the new Intel Xeon Phi Processor for its supercomputers because of the potential to support a diverse array of customer needs and deliver the best performance per application. He emphasizes that Cray software tools are key to optimizing Intel Xeon Phi processor performance at the system level.
Offloading to a coprocessor does need to be considered carefully, due to the memory transfer requirements. When the data that is to be worked on resides in the memory of the main system, that data must be transferred to the coprocessor’s memory. The challenge arises because memory is not physically shared between the main system and the coprocessor.
“There are two offload models that the developer must consider when programming an application. The first is the non-shared memory model, and the second is the virtual shared memory model. Both of these models can be used in the same application.”
Today, Allinea announced that the company will be exhibiting at XSEDE16 July 17-21 in Miami. The conference will attract an audience across industry and academia to discuss the key themes of diversity, big data and science at scale. “Our tools are used extensively across the XSEDE user base so we’re delighted to be extending the value they bring by giving practical advice for getting the best out of infrastructure capabilities through software tuning, especially given the addition of support for the full Intel Xeon Phi family in our new v6.1 software release,” said Rob Rick, VP Americas for Allinea.”
An eye-popping visualization of two black holes colliding demonstrates 3D Adaptive Mesh Refinement volume rendering on next-generation Intel® Xeon Phi™ processors. “It simplifies things when you can run on a single processor and not have to offload the visualization work,” says Juha Jäykkä, system manager of the COSMOS supercomputer. Dr. Jäykkä holds a doctorate in theoretical physics and also serves as a scientific consultant to the system’s users. “Programming is easier. The Intel Xeon Phi processor architecture is the next step for getting more performance and more power efficiency, and it is refreshingly convenient to use.”
Kyoto University Thinks Widening SIMD Will be Key to Performance Gains in New Intel Xeon Phi processor-based Cray System
“With an imminent switchover to a new Cray system with next-generation Intel Xeon Phi Processors (codenamed Knights Landing) planned for October, the ACCMS team at Kyoto University is eagerly looking forward to a potential two-fold application performance improvements from its new system. But the lab is also well aware that there is significant recoding work ahead before the promise of the new manycore technology can be realized.”
In this special guest feature, Robert Roe from Scientific Computing World writes that the new #1 system on the TOP500 is using home-grown processors to shake up the supercomputer industry. “While the system does have a focus towards computation, as opposed to the more data-centric computing strategies that we have begun to see implemented in the US and Europe, it is most certainly not just a Linpack supercomputer. The report explains that there are already three applications running on the Sunway TaihuLight system which are finalists for the Gordon Bell Award at SC16.”
Organizations that implement high-performance computing (HPC) technologies have a wide range of requirements. From small manufacturing suppliers to national research institutions, using significant computing technologies is critical to creating innovative products and leading-edge research. No two HPC installations are the same. For maximum return, budget, software requirements, performance and customization all must be considered before installing and operating a successful environment.
Today Russia’s RSC Group announced that the company has received the elite HPC Data Center Specialist partner status from Intel Corporation, confirming the very high level competence of company’s employees and its business experience in development and deployment of HPC solutions based on Intel server products. According to RSC, only 12 companies in the EMEA region have received such recognition while only 35 Intel partners have received it worldwide.
At ISC 2016, Supermicro debuted the latest innovations in HPC architectures and technologies including a 2U 4-Node server supporting new Intel Xeon Phi processors (formerly code named Knights Landing) with integrated or external Intel Omni-Path fabric option, together with associated 4U/Tower development workstation; 1U SuperServer supporting up to 4 GPU including the next generation P100 GPU; Lustre High Performance File system; and 1U 48-port top-of-rack network switch with 100Gbps Intel Omni-Path Architecture (OPA) providing a unique HPC cluster solution offering excellent bandwidth, latency and message rate that is highly scalable and easily serviceable.