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Kx Streaming Analytics Crunches 1.2 Billion NYC Taxi Data Points using Intel Xeon Phi

“The complexity and high costs of architecting and maintaining streaming analytics solutions often make it difficult to get new projects off the ground. That’s part of the reason Kx, a leading provider of high-volume, high-performance databases and real-time analytics solutions, is always interested in exploring how new technologies may help it push streaming analytics performance and efficiency boundaries. The Intel Xeon Phi processor is a case in point. At SC16 in Salt Lake City, Kx used a 1.2 billion record database of New York City taxi cab ride data to demonstrate what the Intel Xeon Phi processor could mean to distributed big data processing. And the potential cost/performance implications were quite promising.”

Lenovo Boosts Marconi Supercomputer to 6.2 Petaflops with Intel Xeon Phi

“Phase one at CINECA, an academic consortium, was completed in May 2016 – coming in at 1.7 Petaflops, which at the time it was the largest Intel Omni-Path Fabric system in the world. Lenovo and CINECA are pleased to announce the delivery and installation of phase two, a 3,600 node Intel Xeon Phi processor which is interconnected with 100Gb Intel Omni-Path fabric – delivering 6.2 Petaflops of performance.”

Intel Xeon Phi with Software Defined Visualization at SC16

“Software Defined Visualization (SDVis) is an open source initiative from Intel and industry collaborators to improve the visual fidelity, performance and efficiency of prominent visualization solutions – with a particular emphasis on supporting the rapidly growing “Big Data” usage on workstations through HPC supercomputing clusters without the memory limitations and cost of GPU based solutions. Existing applications can be enhanced using the high performing parallel software rendering libraries OpenSWR, Embree, and OSPRay. At the Intel HPC Developer Conference, Amstutz provided an introduction to this initiative, its benefits, a brief descriptions of accomplishments in the past year and talk about the changes made to Intel provided libraries in the past year.”

Best Threads Per Core with Intel Xeon Phi

“When designing an application that contains many threads and less cores than threads, it is important to understand what is the optimal number of threads that should be assigned to a core. This value should be parameterized, in order to easily run tests to determine which is the optimum value for a given machine. One thread per core on the Intel Xeon Phi processor will give the highest performance per thread. When the number of threads per core is set at two or four, the individual thread performance may be lower, but the aggregate performance will be greater.”

Asetek Lands Nine Installations on the Green500

“As seen at installations included on both the Green500 and Top500 lists, Asetek’s distributed liquid cooling architecture enables cluster energy efficiency in addition to sustained and un-throttled cluster performance,” said John Hamill, Vice President of WW Sales and Marketing. “Around the world, data centers are increasingly using Asetek technology for High Performance Computing while reducing energy costs.”

13.7 Petaflop MareNostrum 4 Supercomputer Coming to BSC

Today the Barcelona Supercomputing Center announced plans to MareNostrum 4, a 13.7 Petaflop supercomputer that will be 12.4 times more powerful than the current MareNostrum 3 system. In a contract valued at almost €30 million, IBM will integrate in one sole machine using its own technologies alongside those of Lenovo, Intel, and Fujitsu.

RSC Tornado Breaks Record with 1.41 Petaflops per Rack

Today Russia’s RSC Group announced that the company has achieved a record compute density of 1.41 Pflops per rack using direct liquid cooling and Intel Xeon Phi processors. “RSC supported the TUM student team from Munich with 8 nodes mobile cluster based on RSC Tornado direct liquid cooled architecture. This computing system provided stable operation of computing nodes in “hot water” mode at +63 °С cooling agent temperature at node inputs and had the following configuration: 72-cores Intel Xeon Phi 7290 processors, Intel S7200AP server boards, Intel SSD DC S3500 Series M.2 340 GB solid-state drives, switch and adapters based on Intel Omni-Path high-speed fabric, highly efficient Micron DDR4-2400 VLP 16-32 GB memory modules.”

Memory Modes For Increased Performance on Intel Xeon Phi

The Intel Xeon Phi processor supports different types of memory, and can organize this into three types of memory mode. The new processor from Intel contains two type of memory, MCDRAM and DDR memory. These different memory subsystems are complimentary but can be used in different ways, depending on the application that is being executed. “By using these two types of memory in the same system gives flexibility to the overall system and will show an increase in performance for almost any application.”

Machine Learning and HPC Converge at NERSC

In this video from the Intel HPC Developer Conference, Prabhat from NERSC describes how high performance computing techniques are being used to scale Machine Learning to over 100,000 compute cores. “Using TB-sized datasets from three science applications: astrophysics, plasma physics, and particle physics, we show that our implementation can construct kd-tree of 189 billion particles in 48 seconds on utilizing ∼50,000 cores.”

Dell EMC Advances in Cloud, Software and Systems at SC16

Today Dell EMC announced new HPC cloud offerings, software, systems and customer success, continuing its focus on democratizing HPC for enterprises of all sizes, optimizing HPC technology innovations and advancing the HPC community. “The global HPC market forecast exceeds $30 billion in 2016 for all product and services spending, including servers, software, storage, cloud, and other categories, with continued growth expected at 5.2 percent CAGR through 2020,” said Addison Snell, CEO, Intersect360 Research. “Bolstered by its combination with EMC, Dell will hold the number-one position in total HPC revenue share heading into 2017.”