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Video: Introduction to the Cheyenne Supercomputer

Cheyenne is a new 5.34-petaflops, high-performance computer built for NCAR by SGI. Cheyenne be a critical tool for researchers across the country studying climate change, severe weather, geomagnetic storms, seismic activity, air quality, wildfires, and other important geoscience topics. In this video, Brian Vanderwende from UCAR describes typical workflows in the NCAR/CISL Cheyenne HPC environment as well as performance […]

Speeding Workloads at the Dell EMC HPC Innovation Lab

The Dell EMC HPC Innovation Lab, substantially powered by Intel, has been established to provide customers best practices for configuring and tuning systems and their applications for optimal performance and efficiency through blogs, whitepapers and other resources. “Dell is utilizing the lab’s world-class Infrastructure to characterize performance behavior and to test and validate upcoming technologies.”

Upgraded Bridges Supercomputer Now in Production

“Bridges’ new nodes add large-memory and GPU resources that enable researchers who have never used high-performance computing to easily scale their applications to tackle much larger analyses,” says Nick Nystrom, principal investigator in the Bridges project and Senior Director of Research at PSC. “Our goal with Bridges is to transform researchers’ thinking from ‘What can I do within my local computing environment?’ to ‘What problems do I really want to solve?’”

Beauty Meets HPC: An Overview of the Barcelona Supercomputing Center

“The multidisciplinary research team and computational facilities –including MareNostrum– make BSC an international centre of excellence in e-Science. Since its establishment in 2005, BSC has developed an active role in fostering HPC in Spain and Europe as an essential tool for international competitiveness in science and engineering. The center manages the Red Española de Supercomputación (RES), and is a hosting member of the Partnership for Advanced Computing in Europe (PRACE) initiative.”

Speed Your Application with Threading Building Blocks

With modern processors that contain a large number of cores, to get maximum performance it is necessary to structure an application to use as many cores as possible. Explicitly developing a program to do this can take a significant amount of effort. It is important to understand the science and algorithms behind the application, and then use whatever programming techniques that are available. “Intel Threaded Building Blocks (TBB) can help tremendously in the effort to achieve very high performance for the application.”

Optimizing Your Code for Big Data

Libraries that are tuned to the underlying hardware architecture can increase performance tremendously. Higher level libraries such at the Intel Data Analytics Acceleration Library (Intel DAAL) can assist the developer with highly tuned algorithms for data analysis as well as machine learning. Intel DAAL functions can be called within other, more comprehensive frameworks that deal with the various types of data and storage, increasing the performance and lowering the development time of a wide range of applications.

SGI Awarded $27M Systems Contract with ARL

Today, SGI announced that the United States Department of Defense (DoD) has selected SGI ICE XA for two of its Army Research Laboratory Defense Supercomputing Resource Center systems. The upgrades are part of a technology insertion, known as TI-16, for their High Performance Computing Modernization Program (HPCMP). “We’re excited to partner with SGI for our TI-16 DoD program, and have full confidence in the system’s ability to provide excellent performance,” said Dr. Raju Namburu, director of ARL DSRC. “Choosing the right HPC partners is crucial, as we rely on supercomputing and large-scale analytics and predictive sciences to provide the competitive edge we need to maintain our position as the nation’s premier laboratory for land forces.”

A New Generation of Performance with Intel Xeon Phi

“With up to 72 out-of-order cores, the new Intel Xeon Phi processor delivers over 3 teraFLOPS (floating-point operations per second) of double-precision peak while providing 3.5 times higher performance per watt than the previous generation. As a bootable CPU with integrated architecture, the Intel Xeon Phi processor eliminates PCIe* bottlenecks, includes on-package high-bandwidth memory, and available integrated Intel Omni-Path fabric architecture to deliver fast, low-latency performance.”

Preparing Code For Parallel Execution

With the advent of the tremendous compute density of new processors, it is important to understand if an application can take advantage of multicore. “Developers should understand if an application might be ready to run in a highly vectorized or many core environment before attempting to do the work necessary to obtain the high performance that might be expected.”

Cheyenne – NCAR’s Next-Gen Data-Centric Supercomputer

In this video, Dave Hart, CISL User Services Manager presents: Cheyenne – NCAR’s Next-Generation Data-Centric Supercomputing Environment. “Cheyenne is a new 5.34-petaflops, high-performance computer built for NCAR by SGI. The hardware was delivered on Monday, September 12, at the NCAR-Wyoming Supercomputing Center (NWSC) and the system is on schedule to become operational at the beginning of 2017. All of the compute racks were powered up and nodes booted up within a few days of delivery.”