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NERSC Dungeon Session Speeds Code for Cori Supercomputer

Six application development teams from NERSC gathered at Intel in early August for a marathon “dungeon session” designed to help tweak their codes for the next-generation Intel Xeon Phi Knight’s Landing manycore architecture and NERSC’s new Cori supercomputer. “We try to prepare ahead of time to bring the types of problems that can only be solved with the experts at Intel and Cray present—deep questions about the architecture and how applications use the Xeon Phi processor. It’s all geared toward optimizing the codes to run on the new manycore architecture and on Cori.”

DOE to Invest $16 Million in Supercomputing Materials

Today the U.S. Department of Energy announced that it will invest $16 million over the next four years to accelerate the design of new materials through use of supercomputers. “Our simulations will rely on current petascale and future exascale capabilities at DOE supercomputing centers. To validate the predictions about material behavior, we’ll conduct experiments and use the facilities of the Advanced Photon Source, Spallation Neutron Source and the Nanoscale Science Research Centers.”

NERSC to Host Data Day on August 22

Today NERSC announced plans to host a new, data-centric event called Data Day. The main event will take place on August 22, followed by a half-day hackathon on August 23. The goal: to bring together researchers who use, or are interested in using, NERSC systems for data-intensive work.

Materials Lab at LBNL Releases Battery and Molecule Data to Public

The Materials Project has enabled some of the most exciting research in my group,” said Morgan, who also serves on the Materials Project’s advisory board. “By providing easy access to a huge database, as well as tools to process that data for thermodynamic predictions, the Materials Project has enabled my group to rapidly take on materials design projects that would have been prohibitive just a few years ago.”

Video: Developing, Configuring, Building, and Deploying HPC Software

“The process of developing HPC software requires consideration of issues in software design as well as practices that support the collaborative writing of well-structured code that is easy to maintain, extend, and support. This presentation will provide an overview of development environments and how to configure, build, and deploy HPC software using some of the tools that are frequently used in the community.”

Disruptive Opportunities and a Path to Exascale: A Conversation with HPC Visionary Alan Gara of Intel

“We want to encourage and support that collaborative behavior in whatever way we can, because there are a multitude of problems in government agencies and commercial entities that seem to have high performance computing solutions. Think of bringing together the tremendous computational expertise you find from the DOE labs with the problems that someone like the National Institutes of Health is trying to solve. You couple those two together and you really can create something amazing that will affect all our lives. We want to broaden their exposure to the possibilities of HPC and help that along. It’s important, and it will allow all of us in HPC to more broadly impact the world with the large systems as well as the more moderate-scale systems.”

Video: Best Practices in HPC Software Development

“Scientific code developers have increasingly been adopting software processes derived from the mainstream (non-scientific) community. Software practices are typically adopted when continuing without them becomes impractical. However, many software best practices need modification and/or customization, partly because the codes are used for research and exploration, and partly because of the combined funding and sociological challenges. This presentation will describe the lifecycle of scientific software and important ways in which it differs from other software development. We will provide a compilation of software engineering best practices that have generally been found to be useful by science communities, and we will provide guidelines for adoption of practices based on the size and the scope of the project.”

NERSC Paper on Burst Buffers Recognized at Cray User Group

A new paper outlining NERSC’s Burst Buffer Early User Program and the center’s pioneering efforts in recent months to test drive the technology using real science applications on Cori Phase 1 has won the Best Paper award at this year’s Cray User Group (CUG) meeting.

Superfacility – How New Workflows in the DOE Office of Science are Changing Storage Requirements

Katie Antypas from NERSC presented this talk at the 2016 MSST conference. Katie is the Project Lead for the NERSC-8 system procurement, a project to deploy NERSC’s next generation supercomputer in mid-2016. The system, named Cori, (after Nobel Laureate Gerty Cori) will be a Cray XC system featuring 9300 Intel Knights Landing processors. The Knights Landing processors will have over 60 cores with 4 hardware threads each and a 512 bit vector unit width. It will be crucial that users can exploit both thread and SIMD vectorization to achieve high performance on Cori.”

Edison Supercomputer Helps Find Roots of MJO Modeling Mismatches

The MJO occurs on its own timetable—every 30 to 60 days—but its worldwide impact spurs scientists to unlock its secrets. The ultimate answer? Timely preparation for the precipitation havoc it brings—and insight into how it will behave when pressured by a warming climate.