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New Paper: Can 3D-Stacking Topple the Memory Wall?

Memory latency depends on the used memory bandwidth, and the memory latency-bandwidth curve has three regions — constant, linear and exponential. Moving from conventional DDRx (upper figure) to high-bandwidth memory solutions (lower figure) will significantly reduce memory latency only for workloads located in theexponential region of the DDRx latency-bandwidth curve.

Can 3D-stacking technology topple the long-standing “memory wall” that’s been holding back HPC application performance? A new paper from the Barcelona Supercomputing Center written in collaboration with experts from Chalmers University and Lawrence Livermore National Laboratory concludes that it will take more than just the simple replacement of conventional DIMMs with 3D-stacked devices.

Radio Free HPC Looks at the Grand Challenges of NSCI


In this podcast, the Radio Free HPC team looks at the new round of Grand Challenges targeted by the National Strategic Computing Initiative (NSCI). The conversation was sparked by an Scientific Computing editorial by IBM’s Dave Turek.

SC15 Blog Puts the Spotlight on Invited Talks


SC15 has stepped up with a series of blog posts previewing the conference this year, an effort that seems much more engaging than the random press releases we’ve seen in the past.

StartupHPC-15 Conference Posts Agenda for Austin Event


The good folks from the StartupHPC-15 Conference have posted the Agenda for their meeting at SC15. The day-long conference takes place Monday, Nov 16 in Austin at the Capital Factory in Downtown Austin, Texas. “Does your Startup have ties to High Performance Computing? Please come, meet like minded people, listen to industry notables, and help StartupHPC continue its efforts to build a support community.”

Video: HP R&D and HPC

Joseph George, Director, HP Apollo Servers, HPC & Big Data Solutions

“The HP Apollo 8000 supercomputing platform approaches HPC from an entirely new perspective as the system is cooled directly with warm water. This is done through a “dry-disconnect” cooling concept that has been implemented with the simple but efficient use of heat pipes. Unlike cooling fans, which are designed for maximum load, the heat pipes can be optimized by administrators. The approach allows significantly greater performance density, cutting energy consumption in half and creating synergies with other building energy systems, relative to a strictly air-cooled system.”

Is MDX the Future of Engineering Simulation?


“By adopting an MDX philosophy, engineers are able to test designs automatically from the early concept stages and against all of the physical factors that might influence a system’s performance. It assesses which set of design parameters will break a system, and which will improve it. This pushes back the simulation process to force engineers to question every assumption they have made within a design, and optimise it appropriately by assessing a simulation with multiple operating scenarios.”

Mellanox to Acquire EZchip AKA Tilera


Today Mellanox announced a definitive agreement to acquire EZchip, a leader in high-performance processing solutions for carrier and data center networks. You may recognize EZchip from their recent Tilera acquisition, makers of Tile-Gx multicore network processors.

IBM Storage With OpenStack

IBM Cloud Service

While there is much discussion and products in the market regarding cloud computing and the ability to spin up a virtual machines quickly and efficiently, the fact remains that without planning for cloud based storage, the data will get lost. Simply put, without storage, there is no data.

UCX: Co-Design Architecture For Next Generation HPC Systems


“The UCX Unified Communication X project is a collaboration between industry, laboratories, and academia to create an open-source production grade communication framework for data centric and high-performance applications. At the core of the UCX project are the combined features, ideas, and concepts of industry leading technologies including MXM, PAMI and UCCS. Mellanox Technologies has contributed their MXM technology, which provides enhancements to parallel communication.”

Jack Dongarra to Keynote Intel HPC Developer Conference at SC15

Jack Dongarra, University of Tennessee

Jack Dongarra from the University of Tennessee will keynote the first-ever Intel HPC Developer Conference, Nov. 14-15 in Austin, Texas. “The Intel HPC Developer Conference offers high levels of access. This is your best opportunity to connect with Intel architecture experts, meet HPC industry leaders, and build a lasting network of peers. This is your best opportunity to connect with Intel architecture experts, meet HPC industry leaders, and build a lasting network of peers. The conference will also offer insights into the future of HPC with Intel experts on visualization, machine learning, software tools and much more.”