“OpenCL is a fairly new programming model that is designed to help programmers get the most out of a variety of processing elements in heterogeneous environments. Many benchmarks that are available have demonstrated that excellent performance can be obtained over a wide variety of devices. Rather than lock an application into one specific accelerator, by using OpenCL, applications can be run over on a number of different architectures with each showing excellent speedups over a native (host cpu) implementation.”
KAUST in Saudi Arabia has been named as the latest Intel Parallel Computing Center. “The new PCC aims to provide scalable software kernels common to scientific simulation codes that will adapt well to future architectures, including a scheduled upgrade of KAUST’s globally Top10 Intel-based Cray XC40 system. In the spirit of co-design, Intel PCC at KAUST will also provide feedback that could influence architectural design trade-offs.”
“At IDF, Intel introduced Intel Optane technology, which is based on the revolutionary 3D XPoint non-volatile memory media and combined with the company’s advanced system memory controller, interface hardware and software IP, to unleash vast performance potential in a range of forthcoming products. Intel Optane technology will first come to market in a new line of high-endurance, high-performance Intel SSDs beginning in 2016. The new class of memory technology will also power a new line of Intel DIMMs designed for Intel’s next-generation data center platforms.”
In this video from the AIAA Aviation Conference 2015, panelists discuss Supercomputing: Roadmap and its Future Role in Aerospace Engineering. “Supercomputing has made significant contributions in aerospace engineering in recent decades, including advances in computational fluid dynamics that has fundamentally altered the way aircraft are designed. And the relentless growth in high-performance computing power holds promise of huge leaps in engine performance and other aerospace technology.”
The big memory “Blacklight” system at the Pittsburgh Supercomputer Center will be retired on Aug 15 to make way for the new “Bridges” supercomputer. “Built by HP, Bridges will feature multiple nodes with as much as 12 terabytes each of shared memory, equivalent to unifying the RAM in 1,536 high-end notebook computers. This will enable it to handle the largest memory-intensive problems in important research areas such as genome sequence assembly, machine learning and cybersecurity.”
Today Colfax International announced free online workshops on parallel programming and optimization for Intel architecture, including Intel Xeon processors and Intel Xeon Phi coprocessors. “The Hands-on Workshop (HOW) series will introduce best practices to researchers and developers to efficiently extract maximum performance out of modern parallel processors, achieving shorter time to solution, higher research productivity, and future-proof design.”
The Embree kernel approach, using the Intel Xeon Phi coprocessor is applicable to many situations. The implementation can be tuned to the hardware available, using different vector widths and workloads per ray. With a flexible toolkit for rendering, applications can take advantage of the latest hardware acceleration to achieve maximum performance.