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Interview: Next-Generation Cori Supercomputer Coming to NERSC

Sudip Dosanjh

“We need to emphasize here that the Knights Landing processor is self-hosted, and so that means it’s not an accelerator. It’s not a coprocessor and the particular kernel processor that will be having for NERSC-8, will have more than 60 cores and it will have multiple hardware threads for the core. That’s a lot, right? Having 60 cores per node with multiple hardware thread. That a significant increase from both our Hopper and Edison system, which has 24 cores each. So we’re going to be working with our users to figure out what’s the right amount of parallelism that they need to expose in their application. That’s one really big difference.”

Interview: Raj Hazra and Charlie Wuischpard on Steering the Next Generation of Intel HPC

Charles Wuischpard

“I brought Charlie on because my philosophy is to put people that are better than me on things that are critical to the mission at hand. That is, Charlie’s focus is to run the ship hard, fast, lean and get it ready as it goes through that turn. And my job then is to work with the larger Intel organization at the strategy office up to the exec office in laying track for that new direction. And so together I think we’ve got a very good partnership to lead what has really become one of the strongest teams in HPC going forward.”

Slidecast: COSMIC Middleware for Xeon Phi Servers and Clusters


“Now in Beta, COSMIC is NEC’s system software that enables seamless Xeon Phi coprocessor sharing. It is completely transparent to applications and all other system software components. COSMIC is useful in organizations where several users share one or more Xeon Phi-based servers, and it can thus reduce capital cost by efficiently utilizing fewer servers.”

How Allinea MAP helps Programmers Speed the Intel Xeon Phi


In this video from SC13, Intel Software Evangelist James Reinders describes how Allinea MAP helps programmers get the highest possible application performance from the Intel Xeon Phi.