New technology?

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So I saw this when it was announced yesterday, but I wasn’t (and I’m still not) sure how to cover it. Here’s a link to the release, along with an excerpt.

A prototype of what may be the next generation of personal computers has been developed by researchers in the University of Maryland’s A. James Clark School of Engineering. Capable of computing speeds 100 times faster than current desktops, the technology is based on parallel processing on a single chip.

The release is aimed at my mom and dad, with no technology details. Obviously we’re already doing parallel processing on a single chip. There is a hint that there is some new software in there somewhere

“The ‘software’ challenge is: Can you manage all the different tasks and workers so that the job is completed in 3 minutes instead of 300?” Vishkin continued. “Our algorithms make that feasible for general-purpose computing tasks for the first time.”

The release has quotes from Burton Smith and a few other well-knowns. I’ll dig into and see if there’s anything interesting in there. In the meantime, consider yourself as having a heads up…and if you know anything about this, email me or leave a comment sharing what you know.


  1. Lorin Hochstein sent me this note by email, which I found handy and confirms what I’ve seen on the blogs since the announcement was made. (Thanks, Lorin!)

    I know a little bit about the technology you mentioned in this blog entry, since I completed my PhD at Maryland just last year and had some interactions with Uzi Vishkin while I was there.

    Uzi is a big proponent of the PRAM parallel programming model. He has been working for years on a parallel hardware architecture that can efficiently run programs written using a PRAM-like programming model, he calls his architecture XMT (“explicit multi-threading”). His group has also developed a compiler for a language they call XMT-C which is basically C with some simple extensions to support PRAM.

    I’m not an HPC expert (I’m a software engineering person who studies HPC people), but my understanding is that everybody agrees PRAM is a much easier parallel programming model than existing models (e.g. message-passing, multithreaded), but it has never been feasible to build a system that supports a PRAM programming model and still achieves decent performance.

    From the press release, it sounds like he has a working prototype of such a system now.