Chelsio Announces 4th Generation Terminator Chip

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Chelsio, today, announced details on their 4th generation 10GbE silicon technology.  The Terminator 4 [T4] silicon platform is targeted at LAN-on-motherboard [LOM] design opportunities.  The T4 architecture includes Chelsio’s 4th generation TCP-offload [TOE] design, 3rd generation iSCSI design and 2nd generation iWARP [RDMA] implementation.  T4 also supports fibre channel over Ethernet [FCoE].

The Terminator 4 is an impressive ASIC, capable of offloading network, storage and clustering protocols while also including key virtualization features,” said Bob Wheeler, senior analyst at The Linley Group.  “The convergence of network traffic around 10Gb Ethernet is happening now and the availability of a universal 10GbE controller like the Terminator should help accelerate this trend.”

Specific to HPC, the Chelsio press release quotes T4 enabling RDMA latency to drop from six microseconds [as quoted in the T3 chip] to two microseconds.

he networks are converging around 10Gb Ethernet for a number of reasons, and the day is coming when enterprise data center network and storage traffic will be sharing a common infrastructure,” said Kianoosh Naghshineh, president and CEO.  “Our fourth generation technology is unmatched in the industry, and our OEM partners understand that offloading protocols such as iWARP and iSCSI requires a reliable, tested TCP engine.”

Chelsio’s press release actually has quite a bit of technical information [kudos to Chelsio for this].  For more info, read their full release here.


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  1. I have chip like that in my head. Victims detected!

  2. Skynet started from this chip… be ready, dudes…