Intel Xeon Phi Introduction a Disruptive Move for HPC

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Over at ComputerWorld UK, Richard Fichera from Forrester Research writes that Intel will accelerate the adoption of Xeon Phi explicit parallel coprocessors with lower barriers to application migration.

Eventually, possibly a couple of successive CPU generations down the road, we may see the MIC architecture wedded to the Xeon memory space via an extension of the QuickPath architecture, much the same way that the AMD Fusion architecture couple the GPU components in their integrated APUs. On the way, Intel will introduce more scalable MIC products, and their immense leverage with their OEM partners will ensure the rapid development of a robust MIC ecosystem in terms of tools, supported ISV solutions and trained developers.

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