In this time-lapse video, the Mira supercomputer is assembled at Argonne National Laboratory. With an amazing 1048 nodes per rack, the 10 Petaflop IBM Blue Gene/Q system was reportedly brought up and running production codes in record time.
insideHPC in association with the technology analyst firm OrionX.net today announced the launch of the @HPCpodcast, featuring OrionX.net analyst Shahin Khan and Doug Black, insideHPC’s editor-in-chief. @HPCpodcast is intended to be a lively and informative forum examining key technology trends driving high performance computing and artificial intelligence. Each podcast will feature Khan and Blacks’ comments on the latest HPC news and also a deeper dive into a focused topic. In our first @HPCpodcast episode, we talk about a recent spate of good news for Intel before taking up one of the hottest areas of the advanced computing arena: new HPC-AI chips. You can find the @HPCpodcast on insideHPC and on Twitter. Here’s the RSS feed: http://orionx.net/category/audio-podcast/feed We welcome your suggestions [READ MORE…]
Today, every high-performance computing (HPC) workload running globally faces the same crippling issue: Congestion in the network. Congestion can delay workload completion times for crucial scientific and enterprise workloads, making HPC systems unpredictable and leaving high-cost cluster resources waiting for delayed data to arrive. Despite various brute-force attempts to resolve the congestion issue, the problem has persisted. Until now. In this paper, Matthew Williams, CTO at Rockport Networks, explains how recent innovations in networking technologies have led to a new network architecture that targets the root causes of HPC network congestion, specifically: - Why today’s network architectures are not a sustainable approach to HPC workloads - How HPC workload congestion and latency issues are directly tied to the network architecture - Why a direct interconnect network architecture minimizes congestion and tail latency
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