NERSC Leads Next-Generation Code Optimization Effort

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NERSClogocolorToday NERSC announced a collaboration with Cray and Intel to help users prepare for the Cori architecture and exascale computing.

With the promise of exascale supercomputers looming on the horizon, much of the roadmap is dotted with questions about hardware design and how to make these systems energy efficient enough so that centers can afford to run them. Often taking a back seat is an equally important question: will scientists be able to adapt their applications to take advantage of exascale once it arrives?

Cori, a Cray XC system slated to be deployed at NERSC in 2016, is intended to meet the growing computational needs of DOE’s science community and serve as a platform for transitioning users to energy-efficient, manycore architectures. NESAP—which will include partnerships with 20 application code teams and technical support from NERSC, Cray and Intel—was created to make this transition run smoothly.

Sudip Dosanjh

Sudip Dosanjh

We are excited about launching NESAP in partnership with Cray and Intel to help transition our broad user base to energy-efficient architectures,” said Sudip Dosanjh, director of NERSC, the primary HPC facility for the DOE’s Office of Science. “We expect to see many aspects of Cori in an exascale computer, including dramatically more concurrency and on-package memory. The response from our users has been overwhelming—they recognize that Cori will allow them to do science that can’t be done on today’s supercomputers.”

Improving Scientific Productivity

The announcement of Cori earlier this year showcased the system’s manycore architecture, which will enhance scientific productivity by increasing the speed and resolution at which applications can run. A key feature of Cori is the next-generation Intel® Xeon Phi™ processor called Knights Landing, which offers over 60 cores per node and four hardware threads on each core. The processor introduces several technological advances, including higher intra-node parallelism; high-bandwidth, on-package memory; and longer hardware vector lengths.

NERSC's next-generation supercomputer, a Cray XC, will be named after Gerty Cori, the first American woman to be honored with a Nobel Prize in science. She shared the 1947 Nobel Prize with her husband Carl (pictured) and Argentine physiologist Bernardo Houssay.

NERSC’s next-generation supercomputer, a Cray XC, will be named after Gerty Cori, the first American woman to be honored with a Nobel Prize in science. She shared the 1947 Nobel Prize with her husband Carl (pictured) and Argentine physiologist Bernardo Houssay.

These enhanced features are expected to yield significant performance improvements for applications running on Cori. For example, the longer hardware vector lengths and greater intra-node parallelism should help computations perform with greater efficiency and tackle ever larger problems more quickly. And new high-bandwidth memories between main memory and cache offer the promise of much higher performance for memory bandwidth-limited codes, a situation becoming increasingly common for scientific computing applications as more cores are added to each processor.

In order to take advantage of these new technological features, however, application developers will need to make code modifications because many of today’s applications are not optimized to take advantage of the manycore architecture. Most scientific applications—such as those used to study climate change, combustion, astrophysics and materials—are designed to run on parallel systems, meaning that the problem is divided into smaller tasks so more of the calculations can be done simultaneously. With the growing use of manycore processors, applications will need to find even more parallelism, which can be a challenge.

The emerging manycore era has created an inflection point in HPC, setting the HPC community on a trajectory toward exascale computing,” said Charles Wuischpard, vice president and general manager of workstations and HPC at Intel. “The Intel architecture and standards-based programming model creates an ideal platform by which organizations can scale existing investments in applications to deliver compatibility and performance benefits for years to come. As the team at NERSC prepares for Cori, their multi-tier approach to preparing applications for the coming exascale era is setting a great example of leadership for the global HPC community while addressing the emerging challenges of code optimization.”

Additional Optimization Support

The NESAP program will help meet these challenges through broad-based user training, access to early development systems and application kernel deep dives with Cray and Intel specialists. In addition, NERSC and Cray have established a joint Center of Excellence to help users port and optimize target applications that will run on Cori.

Unlike the past few NERSC supercomputing deployments, many of our users will likely need to commit substantial resources to optimize their codes for the Xeon Phi processor that is at the heart of the Cori machine,” said Nick Wright, head of NERSC’s Advanced Technologies Group. “The aim of the NESAP program is to assist users in making these optimizations.”

NERSC will soon announce the 20 applications it has selected to participate in NESAP. The program will partner application teams with resources at NERSC, Cray and Intel, and will last through the acceptance of the Cori system.

By starting this well before Cori arrives, we hope to ensure that our users, and the supercomputing community in general, are ready for the coming exascale revolution,” said Katie Antypas, NERSC’s Services Department Head. “Our goal is to enable performance that is portable across systems and will be sustained in future supercomputing architectures.”

In addition, NERSC is currently hiring eight post-doctoral fellows for the NESAP postdoctoral program. These early-career scientists will be assigned to science application teams to help research optimization strategies and help propel large NERSC applications toward exascale.

While the transition of the NERSC workload to manycore architectures presents several challenges, we’ve developed a plan to address them and acquired the necessary resources to ensure its success,” said Harvey Wasserman, HPC consultant at NERSC and NESAP post-doc lead. “The plan addresses two areas that will be vital to the success of these efforts: advanced education and training for all NERSC users, and a code transition plan with significant resource commitments from NERSC, Cray and Intel. This plan is designed so that once Cori arrives, we have users who can immediately take advantage of this advanced architecture to produce trailblazing science for the DOE mission.”

In related news, check out our interview with NERSC Director Sudip Dosanjh.