In this guest post, Intel explores how Field Programmable Gate Arrays (FPGAs) can be used to accelerate high performance computing.
A Field Programmable Gate Array (FPGA) is a user-customizable semiconductor. Functions can be reprogrammed as market dynamics and standards evolve, or to meet changing manufacturing requirements. FPGAs can improve performance per watt, bandwidth and latency. In addition, they can enhance CPU-based processing by accelerating algorithms and minimizing bottlenecks for a wide variety of workloads.
According to Ian Land, Intel Director of FPGA and Acceleration Marketing, “The world is changing into a hyper connected economy. By 2020, there will be an estimated 50 billion connected devices enabling smart machines and connected people. These devices will communicate at a higher bandwidth than more than 8 billion devices today[i]. Future computing requires high bandwidth and low latency connections, and the FPGA is exceptional at both as well as enhancing Intel Xeon productivity. Communication between these devices will be in areas such as finance doing high frequency trading, genomics comparing genes, artificial intelligence (AI), and big data processing in companies and data centers. FPGAs are extensively used in HPC for data intensive scientific research in areas such as weather forecasting.”
Land indicates that the FPGA is a versatile hardware platform that gives software flexibility and enhances hardware performance to help transform the data center, enable the smart connected world and process the massive workloads in HPC work.
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Intel provides a wide variety of processor solutions including Intel Xeon Scalable Processors, Intel Xeon Phi, Intel FPGAs, and Xeon processors with integrated FPGA, as well as many other accelerators and processors. Tightly coupled programmable multi-function accelerator platforms, such as FPGAs from Intel, offer a single hardware platform that enables servers to address many different workloads needs—from HPC needs for the highest capacity and performance through data center requirements for load balancing capabilities to address different workload profiles. Intel’s FPGAs are flexible, reconfigurable hardware with excellent performance/watt capabilities that enable data centers and HPC researchers to address their workload needs within a constrained power envelope. Programmable hardware FPGA accelerators can be upgraded to provide robust wire speed security in hardware and are also very effective in quickly identifying and mitigating security threats.
The Intel Stratix 10 FPGA is a product that features the HyperFlex core fabric architecture built on the Intel 14 nm Tri-Gate process, which delivers 2X core performance gains over previous-generation, high-performance FPGAs with up to 70 percent lower power compared to the 20nm generation[ii].
Learn more about Intel FPGA solutions.
[i] Land et. al, ISDF SF 2016, Enabling the Vision: DC to Edge
[ii] Comparison based on Stratix V vs. Stratix 10 using Quartus Prime Pro 16.1 Early Beta. Stratix V Designs were optimized using 3 step optimization process of Hyper-Retiming, Hyper-Pipelining, and Hyper-Optimization in order to utilize Stratix 10 architecture enhancements of distributed registers in core fabric. Designs were analyzed using Quartus Prime Pro Fast Forward Compile performance exploration tool. For more details, refer to HyperFlex FPGA Architecture Overview White Paper: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/wp/wp-01220-hyperflex-architecture-fpga-socs.pdf. Actual performance users will achieve varies based on level of design optimization applied. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.