In this video, Georgios Goumas from the Institute of Communication and Computer Systems at the National Technical University of Athens describes how the EuroEXA project is working to develop the exascale computers in Europe.
EuroEXA targets to provide the template for an upcoming exascale system by co-designing and implementing a petascale-level prototype with ground-breaking characteristics. To accomplish this, the project takes a holistic approach innovating both across the technology and the application/system software pillars. EuroEXA proposes a balanced architecture for compute and data-intensive applications, that builds on top of cost-efficient, modular-integration enabled by novel inter-die links, utilises a novel processing unit and embraces FPGA acceleration for computational, networking and storage operations.
EuroEXA hardware designers work together with system software experts optimizing the entire stack from language runtimes to low-level kernel drivers, and application developers that bring in a rich mix of key HPC applications from across climate/weather, physical/energy and life-science/bioinformatics domains to enable efficient system co-design and maximize the impact of the project.
EuroEXA aims to:
- Co-design a ground-breaking platform capable of scaling peak performance to the exascale
- Use a cost-efficient, modular integration approach enabled by novel inter-die links, FPGAs to leverage data-flow acceleration for compute, networking and storage, an intelligent memory compression, a unique geographically-addressed switching interconnect an a novel, ARM-based compute unit
- Provide a homogenized software platform with advanced runtime capabilities supporting novel parallel programming paradigms, dataflow programming, heterogeneous acceleration
Dr. Georgios Goumas graduated from the Dept. of Electrical and Computer Engineering of the National Technical University of Athens (NTUA) (1999). He received a PhD Degree from the School of Electrical and Computer Engineering of NTUA in January 2004. PhD Thesis Title: “Automatic SPMD Code Generation for Tiled Nested Loops”. His research interests include high-performance computing and architectures, resource-aware computing, automatic parallelizing compilers, parallel programming models, run-time systems, scheduling for CMP and extreme-scale systems, performance modeling and others. He has published several research papers in journals and international conferences. He has worked in several European and National R&D programs in the field of High Performance Computing, Networking and Storage for IT systems. He is a member of the IEEE and of the Technical Chamber of Greece.
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