A new European project called De-RISC is preparing a hardware-software platform based on RISC-V for the space and aviation market. Combining a multicore system-on-chip by leading space solutions provider Cobham Gaisler with fentISS’ space-qualified XtratuM hypervisor, De-RISC will create a market-ready platform to power future space and aeronautical applications with made-in-Europe technology.
With the first RISC-V based, fully European platform for space, De-RISC will guarantee access to made-in-Europe technology for aerospace applications, thus contributing to the “Technologies for European non-dependence and competitiveness” program in these strategic markets,’ said Paco Gomez Molinero, chief executive officer of fentISS and coordinator of the De-RISC project.
The new platform will leverage Barcelona Supercomputing Center’s proven multicore interference mitigation techniques to offer high-performance operation with dramatically reduced interference. Meanwhile, Thales, one of the strongest players in the space and aviation market worldwide, will test the platform on real aerospace applications.
The use of RISC-V will also help to future-proof the platform, thanks to an ever-increasing support for the open-source instruction set architecture (ISA), at a time when the proprietary PowerPC and SPARC architectures traditionally used in aviation and space systems are experiencing a loss of momentum. As a result, the space industry is not able to leverage software from the commercial domains, fueling a need to shift to architectures present in higher volume commercial markets. The final platform will be portable to other architectures, and it will also provide superior fault tolerance.
The four partners together represent a formidable team for computing in space. Cobham Gaisler is one of the main providers of processors for the European Space Agency (ESA), while the fentISS XtratuM hypervisor has been used in the latest generation of ”NewSpace” satellites. Barcelona Supercomputing Center (BSC) has a rich portfolio of projects developing the latest technologies for space. Meanwhile, Thales’ long experience in designing, operating and delivering satellite-based systems make them ideally placed to validate the technology for space applications.
De-RISC brings critical features to the market:
- No US export restrictions: most existing products use US technology, thus subject to US export control. De-RISC’s IP core platform and software will not be subject to any US regulatory influence by building on RISC-V.
- Multi-core interference mitigation concepts by BSC integrated in the RISC-V SoC and validated by Thales SA become a unique feature, and will provide a key advantage w.r.t. competitors by limiting drastically interference while preserving high-performance operation.
- Portability: The proposed development will create a RISC-V HW/SW platform that can be implemented in FPGAs and application specific standard products. This provides an edge for integrators that can adapt their choice of implementation technology based on mission requirements.
- Fault-tolerance concepts: The platform will be provided by companies with experience in the space domain and with heritage in design of fault-tolerant systems.
- Future-proof selection for new platforms: New software products are not being ported to SPARC and PowerPC architectures. With an established vendor providing a RISC-V platform there are guarantees of continued support for the hardware platform while developments from the commercial domain for the RISC-V architecture can be leveraged over time.
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