A new paper by Dr Sparsh Mittal surveys techniques for evaluating and optimizing Intel’s Xeon Phi. Now accepted in Concurrency and Computation 2020, the survey reviews nearly 100 papers.
Intel Xeon Phi combines the parallel processing power of a many-core accelerator with the programming ease of CPUs. Phi has powered many supercomputers, e.g., in June 2018 list of Top500 supercomputers, 19 supercomputers used Phi as the main processing unit. This paper surveys works that study the architecture of Phi and use it as an accelerator for various applications. It critically examines the performance bottlenecks and optimization strategies for Phi. For example, the main motivation and justification for development of Phi was ease of programming. Certainly, programming Phi takes much less effort than that required for accelerators such as FPGA and may be even GPU. However, achieving peak performance on Phi is not easy, as it requires myriad set of optimizations and understanding of the microarchitecture. The paper also reviews works that perform comparison or collaborative execution of Phi with CPUs and GPUs. The insights and lessons from Phi will be useful for designers of next-generation computing systems.”
Dr Sparsh Mittal
Sparsh Mittal is a Faculty member at the Department of Electronics and Communications Engineering, Indian Institute of Technology Roorkee. Sparsh does research in VLSI and electronics. His current projects are ‘hardware architecture in computer architecture, deep learning’ and non-volatile memories.
Download the paper: A Survey on Evaluating and Optimizing Performance of Intel Xeon Phi
