At virtual ISC 2021, we sat down with Brock Taylor, AMD’s global HPC solutions director, to talk about the HPC community’s response to AMD’s launch last March of its EPYC 7003 Series 7nm CPUs and to its Radeon Instinct GPUs – including the implementation of both in exascale-class supercomputers to be installed at U.S. national laboratories starting later this year.
Of the new CPU series, Taylor said, “(EPYC) has steadily become a very strong player in the HPC market over the past few years. So when we look at the improvements from our previous generation, we added things like hash enhancement, or changes to how we do the compute die that goes on to the chip. So specifically, from our Zen 2 architecture, the previous generation to the current generation, we went from having four cores here, 16 megabytes of L3 cache to eight cores that share 32 megs of cache. And when you put that together, it ultimately helps with some of the HPC application needs and the improvements that we’ve had in overall performance.”
The latest EPYC chip has broken more than 200 world records, “and that includes records in floating point performance as well as over 30 HPC application world records. So you’re talking about broad applicability that we see not just in high end data centers, but everyday use of high performance computing.
He said the Zen 3 architecture and the latest EPYC chip has broken more than 200 world records, “and that includes records in floating point performance as well as over 30 HPC application world records. So you’re talking about broad applicability that we see not just in high end data centers, but everyday use of high performance computing.”
Over on the GPU side, Taylor said the latest Instinct product line “has actually crossed the goal line of 10 teraflops in Fp64 performance. You’re seeing a lot of fine tuning towards high performance computing that is ultimately rooted in taking our general architecture for GPU and then splitting it into more focused areas. So we have basically the compute side and the graphics side. And when you can take that architecture and then allow it to have one focus that focuses on the graphics and one side that focuses on the compute power, we’re able to take out the things that we don’t need for high performance computing or acceleration of HPC applications.”
At virtual ISC, Taylor said AMD will feature work it’s doing to help researchers and code developers port their codes to GPUs, including an AMD initiative called AMD Instinct Education & Research Initiative (IAER).
